Message ID | 20221121140009.2353512-5-quic_eberman@quicinc.com |
---|---|
State | Superseded |
Headers | show
Return-Path: <devicetree-owner@kernel.org> X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DE959C46467 for <linux-devicetree@archiver.kernel.org>; Mon, 21 Nov 2022 14:02:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231631AbiKUOCc (ORCPT <rfc822;linux-devicetree@archiver.kernel.org>); Mon, 21 Nov 2022 09:02:32 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35680 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231666AbiKUOB7 (ORCPT <rfc822;devicetree@vger.kernel.org>); Mon, 21 Nov 2022 09:01:59 -0500 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B97D238A6; Mon, 21 Nov 2022 06:01:58 -0800 (PST) Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 2ALCFqcj012576; Mon, 21 Nov 2022 14:01:38 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=cWnD/VtzmOTFNtRhKXIobLlELZFzKzUnSZ/Rd7g1umo=; b=UoUTtZWsTlmzGoPQjmC4eMk1292XtvDAas8kUjsV85NEMshaYSBVDibemjIrXVSxdLqL 8uYNYfv+mlpEgaXdhYE/JZj9quETZHLBiJ3sL1/h6D0dzbYHIBn93S72YMdajLraEDJt PfTYJiqMyWVtP72B9e+RfytlbIVej8yME1EKaXO1qAMgZQbPoG61bniZ8q+I+393fpZ9 yhNyiRpKTszdRObLlAezz8gZKGx3hutwu9/MCl3BPj03ko38zSe6LgAoX14PVeizD+2B +jtvOXop0oUutd2idfPmPd61U+WqlqdX6nXr2xRSFoRzJ1dqehXCwVUcBceSwcbAML8h lg== Received: from nasanppmta05.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3kxrbc4n6f-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 21 Nov 2022 14:01:38 +0000 Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 2ALE1b9m030537 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 21 Nov 2022 14:01:37 GMT Received: from hu-eberman-lv.qualcomm.com (10.49.16.6) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Mon, 21 Nov 2022 06:01:36 -0800 From: Elliot Berman <quic_eberman@quicinc.com> To: Bjorn Andersson <quic_bjorande@quicinc.com>, Mark Rutland <mark.rutland@arm.com>, Lorenzo Pieralisi <lpieralisi@kernel.org>, "Sudeep Holla" <sudeep.holla@arm.com> CC: Elliot Berman <quic_eberman@quicinc.com>, Murali Nalajala <quic_mnalajal@quicinc.com>, Trilok Soni <quic_tsoni@quicinc.com>, "Srivatsa Vaddagiri" <quic_svaddagi@quicinc.com>, Carl van Schaik <quic_cvanscha@quicinc.com>, Prakruthi Deepak Heragu <quic_pheragu@quicinc.com>, Arnd Bergmann <arnd@arndb.de>, Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Rob Herring <robh+dt@kernel.org>, "Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>, Jonathan Corbet <corbet@lwn.net>, Catalin Marinas <catalin.marinas@arm.com>, Will Deacon <will@kernel.org>, Jassi Brar <jassisinghbrar@gmail.com>, <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <linux-doc@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-acpi@vger.kernel.org> Subject: [PATCH v7 04/20] arm64: smccc: Include alternative-macros.h Date: Mon, 21 Nov 2022 05:59:53 -0800 Message-ID: <20221121140009.2353512-5-quic_eberman@quicinc.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221121140009.2353512-1-quic_eberman@quicinc.com> References: <20221121140009.2353512-1-quic_eberman@quicinc.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.49.16.6] X-ClientProxiedBy: nalasex01c.na.qualcomm.com (10.47.97.35) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: FuZyxSIjNTHdyHd6fKB7weiepAxSEkDu X-Proofpoint-GUID: FuZyxSIjNTHdyHd6fKB7weiepAxSEkDu X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.219,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-11-21_13,2022-11-18_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 phishscore=0 spamscore=0 bulkscore=0 adultscore=0 suspectscore=0 malwarescore=0 mlxlogscore=633 priorityscore=1501 clxscore=1015 mlxscore=0 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2210170000 definitions=main-2211210109 Precedence: bulk List-ID: <devicetree.vger.kernel.org> X-Mailing-List: devicetree@vger.kernel.org |
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[v7,01/20] docs: gunyah: Introduce Gunyah Hypervisor
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diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h index 220c8c60e021..6a627cdbbdec 100644 --- a/include/linux/arm-smccc.h +++ b/include/linux/arm-smccc.h @@ -383,6 +383,7 @@ asmlinkage void __arm_smccc_hvc(unsigned long a0, unsigned long a1, /* nVHE hypervisor doesn't have a current thread so needs separate checks */ #if defined(CONFIG_ARM64_SVE) && !defined(__KVM_NVHE_HYPERVISOR__) +#include <asm/alternative-macros.h> #define SMCCC_SVE_CHECK ALTERNATIVE("nop \n", "bl __arm_smccc_sve_check \n", \ ARM64_SVE)
Fix build error when CONFIG_ARM64_SVE is selected and asm/alternative-macros.h wasn't implicitly included by another header. In file included from arch/arm64/gunyah/gunyah_hypercall.c:6: arch/arm64/gunyah/gunyah_hypercall.c: In function `gh_hypercall_msgq_send': ./include/linux/arm-smccc.h:387:25: error: expected string literal before `ALTERNATIVE' 387 | #define SMCCC_SVE_CHECK ALTERNATIVE("nop \n", "bl __arm_smccc_sve_check \n", \ Signed-off-by: Elliot Berman <quic_eberman@quicinc.com> --- include/linux/arm-smccc.h | 1 + 1 file changed, 1 insertion(+)