| Message ID | 20221116120157.2706810-7-abel.vesa@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | phy: qualcomm: Add support for SM8550 | expand |
On Wed, Nov 16, 2022 at 02:01:53PM +0200, Abel Vesa wrote: > Add SM8550 both G4 and G3 dual lane compatible strings, also add the > qref supply, the power domains, the reg entries and increase the number > of allowed clocks needed to support the mentioned platform. > > Signed-off-by: Abel Vesa <abel.vesa@linaro.org> > --- > .../phy/qcom,ipq8074-qmp-pcie-phy.yaml | 38 +++++++++++++++++-- > 1 file changed, 35 insertions(+), 3 deletions(-) > > diff --git a/Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml > index 62045dcfb20c..e5752ad93f0a 100644 > --- a/Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml > +++ b/Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml > @@ -32,6 +32,8 @@ properties: > - qcom,sm8250-qmp-modem-pcie-phy > - qcom,sm8450-qmp-gen3x1-pcie-phy > - qcom,sm8450-qmp-gen4x2-pcie-phy > + - qcom,sm8550-qmp-gen3x2-pcie-phy > + - qcom,sm8550-qmp-gen4x2-pcie-phy Here too, don't add new compatibles to the legacy bindings, but rather base it on the sc8280xp binding. Johan
diff --git a/Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml index 62045dcfb20c..e5752ad93f0a 100644 --- a/Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,ipq8074-qmp-pcie-phy.yaml @@ -32,6 +32,8 @@ properties: - qcom,sm8250-qmp-modem-pcie-phy - qcom,sm8450-qmp-gen3x1-pcie-phy - qcom,sm8450-qmp-gen4x2-pcie-phy + - qcom,sm8550-qmp-gen3x2-pcie-phy + - qcom,sm8550-qmp-gen4x2-pcie-phy reg: items: @@ -47,11 +49,17 @@ properties: clocks: minItems: 2 - maxItems: 4 + maxItems: 5 clock-names: minItems: 2 - maxItems: 4 + maxItems: 5 + + power-domains: + maxItems: 1 + + power-domain-names: + maxItems: 1 resets: minItems: 1 @@ -65,6 +73,8 @@ properties: vdda-pll-supply: true + vdda-qref-supply: true + vddp-ref-clk-supply: true patternProperties: @@ -74,7 +84,7 @@ patternProperties: properties: reg: minItems: 3 - maxItems: 6 + maxItems: 7 clocks: items: @@ -206,6 +216,26 @@ allOf: - qcom,sm8250-qmp-gen3x2-pcie-phy - qcom,sm8250-qmp-modem-pcie-phy - qcom,sm8450-qmp-gen4x2-pcie-phy + - qcom,sm8550-qmp-gen3x2-pcie-phy + then: + patternProperties: + "^phy@[0-9a-f]+$": + properties: + reg: + items: + - description: TX lane 1 + - description: RX lane 1 + - description: PCS + - description: TX lane 2 + - description: RX lane 2 + - description: PCS_MISC + + - if: + properties: + compatible: + contains: + enum: + - qcom,sm8550-qmp-gen4x2-pcie-phy then: patternProperties: "^phy@[0-9a-f]+$": @@ -218,6 +248,8 @@ allOf: - description: TX lane 2 - description: RX lane 2 - description: PCS_MISC + - description: LN_SHRD + vdda-qref-supply: true - if: properties:
Add SM8550 both G4 and G3 dual lane compatible strings, also add the qref supply, the power domains, the reg entries and increase the number of allowed clocks needed to support the mentioned platform. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> --- .../phy/qcom,ipq8074-qmp-pcie-phy.yaml | 38 +++++++++++++++++-- 1 file changed, 35 insertions(+), 3 deletions(-)