diff mbox series

watchdog: rzg2l_wdt: Issue a reset before we put the PM clocks

Message ID 20221114180843.1125308-1-prabhakar.mahadev-lad.rj@bp.renesas.com
State New
Headers show
Series watchdog: rzg2l_wdt: Issue a reset before we put the PM clocks | expand

Commit Message

Lad, Prabhakar Nov. 14, 2022, 6:08 p.m. UTC 
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

On RZ/Five SoC it was observed that setting timeout (to say 1 sec)
wouldn't reset the system. To fix this we make sure we issue a reset
before putting the PM clocks to make sure the registers have been cleared.

While at it re-used rzg2l_wdt_stop() in rzg2l_wdt_set_timeout() as
we were calling the same functions here.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
Note,
- This patch has been tested on RZ/G2L, RZ/V2M and RZ/Five.
- My initial investigation showed adding the delay after pm_runtime_get_sync()
  also fixed this issue.
- Do I need add the fixes tag ? what should be the operation PUT->RESET/RESET->PUT?
  in case we need the tag is:
  Fixes: 4055ee81009e6 ("watchdog: rzg2l_wdt: Add set_timeout callback")
---
 drivers/watchdog/rzg2l_wdt.c | 7 ++-----
 1 file changed, 2 insertions(+), 5 deletions(-)

Comments

Biju Das Nov. 14, 2022, 6:42 p.m. UTC | #1 
> -----Original Message-----
> From: Prabhakar <prabhakar.csengg@gmail.com>
> Sent: 14 November 2022 18:09
> To: Geert Uytterhoeven <geert+renesas@glider.be>; Wim Van Sebroeck
> <wim@linux-watchdog.org>; Guenter Roeck <linux@roeck-us.net>; Philipp Zabel
> <p.zabel@pengutronix.de>; linux-watchdog@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org; linux-renesas-soc@vger.kernel.org;
> Prabhakar <prabhakar.csengg@gmail.com>; Biju Das
> <biju.das.jz@bp.renesas.com>; Fabrizio Castro
> <fabrizio.castro.jz@renesas.com>; Prabhakar Mahadev Lad <prabhakar.mahadev-
> lad.rj@bp.renesas.com>
> Subject: [PATCH] watchdog: rzg2l_wdt: Issue a reset before we put the PM
> clocks
> 
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> 
> On RZ/Five SoC it was observed that setting timeout (to say 1 sec) wouldn't
> reset the system. To fix this we make sure we issue a reset before putting
> the PM clocks to make sure the registers have been cleared.
> 
> While at it re-used rzg2l_wdt_stop() in rzg2l_wdt_set_timeout() as we were
> calling the same functions here.
> 
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> ---
> Note,
> - This patch has been tested on RZ/G2L, RZ/V2M and RZ/Five.
> - My initial investigation showed adding the delay after
> pm_runtime_get_sync()
>   also fixed this issue.
> - Do I need add the fixes tag ? what should be the operation PUT-
> >RESET/RESET->PUT?

It looks like timing issue, None of the previous devices are affected by this.

>   in case we need the tag is:
>   Fixes: 4055ee81009e6 ("watchdog: rzg2l_wdt: Add set_timeout callback")
> ---
>  drivers/watchdog/rzg2l_wdt.c | 7 ++-----
>  1 file changed, 2 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/watchdog/rzg2l_wdt.c b/drivers/watchdog/rzg2l_wdt.c
> index 00438ceed17a..d1271cc7750f 100644
> --- a/drivers/watchdog/rzg2l_wdt.c
> +++ b/drivers/watchdog/rzg2l_wdt.c
> @@ -115,16 +115,14 @@ static int rzg2l_wdt_stop(struct watchdog_device *wdev)
> {
>  	struct rzg2l_wdt_priv *priv = watchdog_get_drvdata(wdev);
> 
> -	pm_runtime_put(wdev->parent);
>  	reset_control_reset(priv->rstc);
> +	pm_runtime_put(wdev->parent);
> 
>  	return 0;
>  }
> 
>  static int rzg2l_wdt_set_timeout(struct watchdog_device *wdev, unsigned int
> timeout)  {
> -	struct rzg2l_wdt_priv *priv = watchdog_get_drvdata(wdev);
> -
>  	wdev->timeout = timeout;
> 
>  	/*
> @@ -132,8 +130,7 @@ static int rzg2l_wdt_set_timeout(struct watchdog_device
> *wdev, unsigned int time
>  	 * register so that it is updated with new timeout values.
>  	 */


Maybe update the comment above with new code change.

Cheers,
Biju

>  	if (watchdog_active(wdev)) {
> -		pm_runtime_put(wdev->parent);
> -		reset_control_reset(priv->rstc);
> +		rzg2l_wdt_stop(wdev);
>  		rzg2l_wdt_start(wdev);
>  	}
> 
> --
> 2.25.1
Biju Das Nov. 14, 2022, 7:10 p.m. UTC | #2 
> -----Original Message-----
> From: Geert Uytterhoeven <geert@linux-m68k.org>
> Sent: 14 November 2022 19:04
> To: Biju Das <biju.das.jz@bp.renesas.com>
> Cc: Prabhakar <prabhakar.csengg@gmail.com>; Geert Uytterhoeven
> <geert+renesas@glider.be>; Wim Van Sebroeck <wim@linux-watchdog.org>; Guenter
> Roeck <linux@roeck-us.net>; Philipp Zabel <p.zabel@pengutronix.de>; linux-
> watchdog@vger.kernel.org; linux-kernel@vger.kernel.org; linux-renesas-
> soc@vger.kernel.org; Fabrizio Castro <fabrizio.castro.jz@renesas.com>;
> Prabhakar Mahadev Lad <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Subject: Re: [PATCH] watchdog: rzg2l_wdt: Issue a reset before we put the PM
> clocks
> 
> Hi Biju,
> 
> On Mon, Nov 14, 2022 at 7:42 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> > > -----Original Message-----
> > > From: Prabhakar <prabhakar.csengg@gmail.com>
> > > Sent: 14 November 2022 18:09
> > > To: Geert Uytterhoeven <geert+renesas@glider.be>; Wim Van Sebroeck
> > > <wim@linux-watchdog.org>; Guenter Roeck <linux@roeck-us.net>;
> > > Philipp Zabel <p.zabel@pengutronix.de>;
> > > linux-watchdog@vger.kernel.org
> > > Cc: linux-kernel@vger.kernel.org; linux-renesas-soc@vger.kernel.org;
> > > Prabhakar <prabhakar.csengg@gmail.com>; Biju Das
> > > <biju.das.jz@bp.renesas.com>; Fabrizio Castro
> > > <fabrizio.castro.jz@renesas.com>; Prabhakar Mahadev Lad
> > > <prabhakar.mahadev- lad.rj@bp.renesas.com>
> > > Subject: [PATCH] watchdog: rzg2l_wdt: Issue a reset before we put
> > > the PM clocks
> > >
> > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > >
> > > On RZ/Five SoC it was observed that setting timeout (to say 1 sec)
> > > wouldn't reset the system. To fix this we make sure we issue a reset
> > > before putting the PM clocks to make sure the registers have been
> cleared.
> > >
> > > While at it re-used rzg2l_wdt_stop() in rzg2l_wdt_set_timeout() as
> > > we were calling the same functions here.
> > >
> > > Signed-off-by: Lad Prabhakar
> > > <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > > ---
> > > Note,
> > > - This patch has been tested on RZ/G2L, RZ/V2M and RZ/Five.
> > > - My initial investigation showed adding the delay after
> > > pm_runtime_get_sync()
> > >   also fixed this issue.
> > > - Do I need add the fixes tag ? what should be the operation PUT-
> > > >RESET/RESET->PUT?
> >
> > It looks like timing issue, None of the previous devices are affected by
> this.
> 
> To me it looks like the device must be clocked for the reset signal to be
> propagated?

Yep, provide clk supply for a device, then apply reset.

Cheers,
Biju
Biju Das Nov. 14, 2022, 7:53 p.m. UTC | #3 
> -----Original Message-----
> From: Lad, Prabhakar <prabhakar.csengg@gmail.com>
> Sent: 14 November 2022 19:46
> To: Biju Das <biju.das.jz@bp.renesas.com>
> Cc: Geert Uytterhoeven <geert+renesas@glider.be>; Wim Van Sebroeck
> <wim@linux-watchdog.org>; Guenter Roeck <linux@roeck-us.net>; Philipp
> Zabel <p.zabel@pengutronix.de>; linux-watchdog@vger.kernel.org; linux-
> kernel@vger.kernel.org; linux-renesas-soc@vger.kernel.org; Fabrizio
> Castro <fabrizio.castro.jz@renesas.com>; Prabhakar Mahadev Lad
> <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Subject: Re: [PATCH] watchdog: rzg2l_wdt: Issue a reset before we put
> the PM clocks
> 
> HI Biju,
> 
> Thank you for the review.
> 
> On Mon, Nov 14, 2022 at 6:42 PM Biju Das <biju.das.jz@bp.renesas.com>
> wrote:
> >
> >
> >
> > > -----Original Message-----
> > > From: Prabhakar <prabhakar.csengg@gmail.com>
> > > Sent: 14 November 2022 18:09
> > > To: Geert Uytterhoeven <geert+renesas@glider.be>; Wim Van Sebroeck
> > > <wim@linux-watchdog.org>; Guenter Roeck <linux@roeck-us.net>;
> > > Philipp Zabel <p.zabel@pengutronix.de>;
> > > linux-watchdog@vger.kernel.org
> > > Cc: linux-kernel@vger.kernel.org; linux-renesas-
> soc@vger.kernel.org;
> > > Prabhakar <prabhakar.csengg@gmail.com>; Biju Das
> > > <biju.das.jz@bp.renesas.com>; Fabrizio Castro
> > > <fabrizio.castro.jz@renesas.com>; Prabhakar Mahadev Lad
> > > <prabhakar.mahadev- lad.rj@bp.renesas.com>
> > > Subject: [PATCH] watchdog: rzg2l_wdt: Issue a reset before we put
> > > the PM clocks
> > >
> > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > >
> > > On RZ/Five SoC it was observed that setting timeout (to say 1 sec)
> > > wouldn't reset the system. To fix this we make sure we issue a
> reset
> > > before putting the PM clocks to make sure the registers have been
> cleared.
> > >
> > > While at it re-used rzg2l_wdt_stop() in rzg2l_wdt_set_timeout() as
> > > we were calling the same functions here.
> > >
> > > Signed-off-by: Lad Prabhakar
> > > <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > > ---
> > > Note,
> > > - This patch has been tested on RZ/G2L, RZ/V2M and RZ/Five.
> > > - My initial investigation showed adding the delay after
> > > pm_runtime_get_sync()
> > >   also fixed this issue.
> > > - Do I need add the fixes tag ? what should be the operation PUT-
> > > >RESET/RESET->PUT?
> >
> > It looks like timing issue, None of the previous devices are
> affected by this.
> >
> yep.
> 
> > >   in case we need the tag is:
> > >   Fixes: 4055ee81009e6 ("watchdog: rzg2l_wdt: Add set_timeout
> > > callback")
> > > ---
> > >  drivers/watchdog/rzg2l_wdt.c | 7 ++-----
> > >  1 file changed, 2 insertions(+), 5 deletions(-)
> > >
> > > diff --git a/drivers/watchdog/rzg2l_wdt.c
> > > b/drivers/watchdog/rzg2l_wdt.c index 00438ceed17a..d1271cc7750f
> > > 100644
> > > --- a/drivers/watchdog/rzg2l_wdt.c
> > > +++ b/drivers/watchdog/rzg2l_wdt.c
> > > @@ -115,16 +115,14 @@ static int rzg2l_wdt_stop(struct
> > > watchdog_device *wdev) {
> > >       struct rzg2l_wdt_priv *priv = watchdog_get_drvdata(wdev);
> > >
> > > -     pm_runtime_put(wdev->parent);
> > >       reset_control_reset(priv->rstc);
> > > +     pm_runtime_put(wdev->parent);
> > >
> > >       return 0;
> > >  }
> > >
> > >  static int rzg2l_wdt_set_timeout(struct watchdog_device *wdev,
> > > unsigned int
> > > timeout)  {
> > > -     struct rzg2l_wdt_priv *priv = watchdog_get_drvdata(wdev);
> > > -
> > >       wdev->timeout = timeout;
> > >
> > >       /*
> > > @@ -132,8 +130,7 @@ static int rzg2l_wdt_set_timeout(struct
> > > watchdog_device *wdev, unsigned int time
> > >        * register so that it is updated with new timeout values.
> > >        */
> >
> >
> > Maybe update the comment above with new code change.
> >
>     /*
>      * If the watchdog is active, reset the module for updating the
> WDTSET
>      * register so that it is updated with new timeout values.
>      */
> 
> The above existing comment holds good with this code change. If you
> prefer something else please let me know I'll update it accordingly.

Maybe mention, The resetting of the module is done in wdt_stop function.

Cheers,
Biju
Biju Das Nov. 14, 2022, 7:59 p.m. UTC | #4 
> -----Original Message-----
> From: Lad, Prabhakar <prabhakar.csengg@gmail.com>
> Sent: 14 November 2022 19:56
> To: Biju Das <biju.das.jz@bp.renesas.com>
> Cc: Geert Uytterhoeven <geert+renesas@glider.be>; Wim Van Sebroeck
> <wim@linux-watchdog.org>; Guenter Roeck <linux@roeck-us.net>; Philipp
> Zabel <p.zabel@pengutronix.de>; linux-watchdog@vger.kernel.org; linux-
> kernel@vger.kernel.org; linux-renesas-soc@vger.kernel.org; Fabrizio
> Castro <fabrizio.castro.jz@renesas.com>; Prabhakar Mahadev Lad
> <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Subject: Re: [PATCH] watchdog: rzg2l_wdt: Issue a reset before we put
> the PM clocks
> 
> On Mon, Nov 14, 2022 at 7:53 PM Biju Das <biju.das.jz@bp.renesas.com>
> wrote:
> >
> >
> >
> > > -----Original Message-----
> > > From: Lad, Prabhakar <prabhakar.csengg@gmail.com>
> > > Sent: 14 November 2022 19:46
> > > To: Biju Das <biju.das.jz@bp.renesas.com>
> > > Cc: Geert Uytterhoeven <geert+renesas@glider.be>; Wim Van Sebroeck
> > > <wim@linux-watchdog.org>; Guenter Roeck <linux@roeck-us.net>;
> > > Philipp Zabel <p.zabel@pengutronix.de>;
> > > linux-watchdog@vger.kernel.org; linux- kernel@vger.kernel.org;
> > > linux-renesas-soc@vger.kernel.org; Fabrizio Castro
> > > <fabrizio.castro.jz@renesas.com>; Prabhakar Mahadev Lad
> > > <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > > Subject: Re: [PATCH] watchdog: rzg2l_wdt: Issue a reset before we
> > > put the PM clocks
> > >
> > > HI Biju,
> > >
> > > Thank you for the review.
> > >
> > > On Mon, Nov 14, 2022 at 6:42 PM Biju Das
> > > <biju.das.jz@bp.renesas.com>
> > > wrote:
> > > >
> > > >
> > > >
> > > > > -----Original Message-----
> > > > > From: Prabhakar <prabhakar.csengg@gmail.com>
> > > > > Sent: 14 November 2022 18:09
> > > > > To: Geert Uytterhoeven <geert+renesas@glider.be>; Wim Van
> > > > > Sebroeck <wim@linux-watchdog.org>; Guenter Roeck
> > > > > <linux@roeck-us.net>; Philipp Zabel <p.zabel@pengutronix.de>;
> > > > > linux-watchdog@vger.kernel.org
> > > > > Cc: linux-kernel@vger.kernel.org; linux-renesas-
> > > soc@vger.kernel.org;
> > > > > Prabhakar <prabhakar.csengg@gmail.com>; Biju Das
> > > > > <biju.das.jz@bp.renesas.com>; Fabrizio Castro
> > > > > <fabrizio.castro.jz@renesas.com>; Prabhakar Mahadev Lad
> > > > > <prabhakar.mahadev- lad.rj@bp.renesas.com>
> > > > > Subject: [PATCH] watchdog: rzg2l_wdt: Issue a reset before we
> > > > > put the PM clocks
> > > > >
> > > > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > > > >
> > > > > On RZ/Five SoC it was observed that setting timeout (to say 1
> > > > > sec) wouldn't reset the system. To fix this we make sure we
> > > > > issue a
> > > reset
> > > > > before putting the PM clocks to make sure the registers have
> > > > > been
> > > cleared.
> > > > >
> > > > > While at it re-used rzg2l_wdt_stop() in
> rzg2l_wdt_set_timeout()
> > > > > as we were calling the same functions here.
> > > > >
> > > > > Signed-off-by: Lad Prabhakar
> > > > > <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > > > > ---
> > > > > Note,
> > > > > - This patch has been tested on RZ/G2L, RZ/V2M and RZ/Five.
> > > > > - My initial investigation showed adding the delay after
> > > > > pm_runtime_get_sync()
> > > > >   also fixed this issue.
> > > > > - Do I need add the fixes tag ? what should be the operation
> > > > > PUT-
> > > > > >RESET/RESET->PUT?
> > > >
> > > > It looks like timing issue, None of the previous devices are
> > > affected by this.
> > > >
> > > yep.
> > >
> > > > >   in case we need the tag is:
> > > > >   Fixes: 4055ee81009e6 ("watchdog: rzg2l_wdt: Add set_timeout
> > > > > callback")
> > > > > ---
> > > > >  drivers/watchdog/rzg2l_wdt.c | 7 ++-----
> > > > >  1 file changed, 2 insertions(+), 5 deletions(-)
> > > > >
> > > > > diff --git a/drivers/watchdog/rzg2l_wdt.c
> > > > > b/drivers/watchdog/rzg2l_wdt.c index
> 00438ceed17a..d1271cc7750f
> > > > > 100644
> > > > > --- a/drivers/watchdog/rzg2l_wdt.c
> > > > > +++ b/drivers/watchdog/rzg2l_wdt.c
> > > > > @@ -115,16 +115,14 @@ static int rzg2l_wdt_stop(struct
> > > > > watchdog_device *wdev) {
> > > > >       struct rzg2l_wdt_priv *priv =
> watchdog_get_drvdata(wdev);
> > > > >
> > > > > -     pm_runtime_put(wdev->parent);
> > > > >       reset_control_reset(priv->rstc);
> > > > > +     pm_runtime_put(wdev->parent);
> > > > >
> > > > >       return 0;
> > > > >  }
> > > > >
> > > > >  static int rzg2l_wdt_set_timeout(struct watchdog_device
> *wdev,
> > > > > unsigned int
> > > > > timeout)  {
> > > > > -     struct rzg2l_wdt_priv *priv =
> watchdog_get_drvdata(wdev);
> > > > > -
> > > > >       wdev->timeout = timeout;
> > > > >
> > > > >       /*
> > > > > @@ -132,8 +130,7 @@ static int rzg2l_wdt_set_timeout(struct
> > > > > watchdog_device *wdev, unsigned int time
> > > > >        * register so that it is updated with new timeout
> values.
> > > > >        */
> > > >
> > > >
> > > > Maybe update the comment above with new code change.
> > > >
> > >     /*
> > >      * If the watchdog is active, reset the module for updating
> the
> > > WDTSET
> > >      * register so that it is updated with new timeout values.
> > >      */
> > >
> > > The above existing comment holds good with this code change. If
> you
> > > prefer something else please let me know I'll update it
> accordingly.
> >
> > Maybe mention, The resetting of the module is done in wdt_stop
> function.
> >
>     /*
>      * If the watchdog is active, reset the module for updating the
> WDTSET
>      * register by calling rzg2l_wdt_stop() (which internally calls
> reset_control_reset() and pm_runtime_put()

(which internally calls reset_control_reset() to reset the module)

>      * so that it is updated with new timeout values.
>      */
Lad, Prabhakar Nov. 14, 2022, 8:11 p.m. UTC | #5 
Hi Geert,

On Mon, Nov 14, 2022 at 7:03 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote:
>
> Hi Biju,
>
> On Mon, Nov 14, 2022 at 7:42 PM Biju Das <biju.das.jz@bp.renesas.com> wrote:
> > > -----Original Message-----
> > > From: Prabhakar <prabhakar.csengg@gmail.com>
> > > Sent: 14 November 2022 18:09
> > > To: Geert Uytterhoeven <geert+renesas@glider.be>; Wim Van Sebroeck
> > > <wim@linux-watchdog.org>; Guenter Roeck <linux@roeck-us.net>; Philipp Zabel
> > > <p.zabel@pengutronix.de>; linux-watchdog@vger.kernel.org
> > > Cc: linux-kernel@vger.kernel.org; linux-renesas-soc@vger.kernel.org;
> > > Prabhakar <prabhakar.csengg@gmail.com>; Biju Das
> > > <biju.das.jz@bp.renesas.com>; Fabrizio Castro
> > > <fabrizio.castro.jz@renesas.com>; Prabhakar Mahadev Lad <prabhakar.mahadev-
> > > lad.rj@bp.renesas.com>
> > > Subject: [PATCH] watchdog: rzg2l_wdt: Issue a reset before we put the PM
> > > clocks
> > >
> > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > >
> > > On RZ/Five SoC it was observed that setting timeout (to say 1 sec) wouldn't
> > > reset the system. To fix this we make sure we issue a reset before putting
> > > the PM clocks to make sure the registers have been cleared.
> > >
> > > While at it re-used rzg2l_wdt_stop() in rzg2l_wdt_set_timeout() as we were
> > > calling the same functions here.
> > >
> > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > > ---
> > > Note,
> > > - This patch has been tested on RZ/G2L, RZ/V2M and RZ/Five.
> > > - My initial investigation showed adding the delay after
> > > pm_runtime_get_sync()
> > >   also fixed this issue.
> > > - Do I need add the fixes tag ? what should be the operation PUT-
> > > >RESET/RESET->PUT?
> >
> > It looks like timing issue, None of the previous devices are affected by this.
>
> To me it looks like the device must be clocked for the reset signal
> to be propagated?
>
In the HW manual (7.4.3 Procedure for Activating Modules) it does
state the below before applying the reset signal,

Set up the clock control register for the clock signal connected to
the target module to start the supply of the clock.
Note that the PLL for the clock should be started before the clock if
the PLL is stopped.

So maybe I can add the fixes tag in v2.

Cheers,
Prabhakar
Biju Das Nov. 15, 2022, 8:28 a.m. UTC | #6 
> -----Original Message-----
> From: Geert Uytterhoeven <geert@linux-m68k.org>
> Sent: 15 November 2022 08:11
> To: Biju Das <biju.das.jz@bp.renesas.com>
> Cc: Prabhakar <prabhakar.csengg@gmail.com>; Wim Van Sebroeck
> <wim@linux-watchdog.org>; Guenter Roeck <linux@roeck-us.net>; Philipp
> Zabel <p.zabel@pengutronix.de>; linux-watchdog@vger.kernel.org; linux-
> kernel@vger.kernel.org; linux-renesas-soc@vger.kernel.org; Fabrizio
> Castro <fabrizio.castro.jz@renesas.com>; Prabhakar Mahadev Lad
> <prabhakar.mahadev-lad.rj@bp.renesas.com>
> Subject: Re: [PATCH] watchdog: rzg2l_wdt: Issue a reset before we put
> the PM clocks
> 
> Hi Biju,
> 
> On Tue, Nov 15, 2022 at 8:48 AM Biju Das <biju.das.jz@bp.renesas.com>
> wrote:
> > > > -----Original Message-----
> > > > From: Geert Uytterhoeven <geert@linux-m68k.org> On Mon, Nov 14,
> > > > 2022 at 7:42 PM Biju Das
> > > <biju.das.jz@bp.renesas.com> wrote:
> > > > > > From: Prabhakar <prabhakar.csengg@gmail.com> On RZ/Five SoC
> it
> > > > > > was observed that setting timeout (to say 1
> > > sec)
> > > > > > wouldn't reset the system. To fix this we make sure we issue
> a
> > > > > > reset before putting the PM clocks to make sure the
> registers
> > > have
> > > > > > been
> > > > cleared.
> > > > > >
> > > > > > While at it re-used rzg2l_wdt_stop() in
> > > > > > rzg2l_wdt_set_timeout()
> > > as
> > > > > > we were calling the same functions here.
> > > > > >
> > > > > > Signed-off-by: Lad Prabhakar
> > > > > > <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > > > > > ---
> > > > > > Note,
> > > > > > - This patch has been tested on RZ/G2L, RZ/V2M and RZ/Five.
> > > > > > - My initial investigation showed adding the delay after
> > > > > > pm_runtime_get_sync()
> > > > > >   also fixed this issue.
> > > > > > - Do I need add the fixes tag ? what should be the operation
> > > PUT-
> > > > > > >RESET/RESET->PUT?
> > > > >
> > > > > It looks like timing issue, None of the previous devices are
> > > > > affected by
> > > > this.
> > > >
> > > > To me it looks like the device must be clocked for the reset
> > > > signal
> > > to
> > > > be propagated?
> > >
> > > Yep, provide clk supply for a device, then apply reset.
> >
> > Maybe we need to make it consistent by taking care of  [1]
> >
> > Current patch: CLK ON -> apply Reset for V2M.
> > [1]:  Apply Reset -> CLK ON for V2M.
> 
> Yes, that would also simplify that patch: just add the call to reset?

Fabrizio previously told me, CLK ON -> apply Reset does not work for RZ/V2M reboot use case.

Regards,
Biju
diff mbox series

Patch

diff --git a/drivers/watchdog/rzg2l_wdt.c b/drivers/watchdog/rzg2l_wdt.c
index 00438ceed17a..d1271cc7750f 100644
--- a/drivers/watchdog/rzg2l_wdt.c
+++ b/drivers/watchdog/rzg2l_wdt.c
@@ -115,16 +115,14 @@  static int rzg2l_wdt_stop(struct watchdog_device *wdev)
 {
 	struct rzg2l_wdt_priv *priv = watchdog_get_drvdata(wdev);
 
-	pm_runtime_put(wdev->parent);
 	reset_control_reset(priv->rstc);
+	pm_runtime_put(wdev->parent);
 
 	return 0;
 }
 
 static int rzg2l_wdt_set_timeout(struct watchdog_device *wdev, unsigned int timeout)
 {
-	struct rzg2l_wdt_priv *priv = watchdog_get_drvdata(wdev);
-
 	wdev->timeout = timeout;
 
 	/*
@@ -132,8 +130,7 @@  static int rzg2l_wdt_set_timeout(struct watchdog_device *wdev, unsigned int time
 	 * register so that it is updated with new timeout values.
 	 */
 	if (watchdog_active(wdev)) {
-		pm_runtime_put(wdev->parent);
-		reset_control_reset(priv->rstc);
+		rzg2l_wdt_stop(wdev);
 		rzg2l_wdt_start(wdev);
 	}