Message ID | 20221113191301.5526-2-Sergey.Semin@baikalelectronics.ru |
---|---|
State | Accepted |
Commit | b8a83e600bdde93e7da41ea3204b2b3832a3c99b |
Headers | show |
Series | [v7,01/20] dt-bindings: imx6q-pcie: Fix clock names for imx6sx and imx8mq | expand |
On Sun, Nov 13, 2022 at 10:12:42PM +0300, Serge Semin wrote: > Originally as it was defined the legacy bindings the pcie_inbound_axi and > pcie_aux clock names were supposed to be used in the fsl,imx6sx-pcie and > fsl,imx8mq-pcie devices respectively. But the bindings conversion has been > incorrectly so now the fourth clock name is defined as "pcie_inbound_axi > for imx6sx-pcie, pcie_aux for imx8mq-pcie", which is completely wrong. > Let's fix that by conditionally apply the clock-names constraints based on > the compatible string content. > > Fixes: 751ca492f131 ("dt-bindings: PCI: imx6: convert the imx pcie controller to dtschema") > Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> > Acked-by: Alexander Stein <alexander.stein@ew.tq-group.com> > > --- > > Changelog v5: > - This is a new patch added on the v5 release of the patchset. > > Changelog v7: > - Move the allOf clause to the bottom of the bindings. (@Krzysztof) > - Get back the names to the clock-names property and make sure the > platform-specific name constraint is applied in the allOf clause. > (@Rob) > --- > .../bindings/pci/fsl,imx6q-pcie.yaml | 46 +++++++++++++++++-- > 1 file changed, 42 insertions(+), 4 deletions(-) We have 2 patches doing the same thing: https://lore.kernel.org/all/20221109002449.35936-1-marex@denx.de/ Please hash out which one you all want. Both seem to have clock warnings still... Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml index 376e739bcad4..49b4f7a32e71 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml @@ -14,9 +14,6 @@ description: |+ This PCIe host controller is based on the Synopsys DesignWare PCIe IP and thus inherits all the common properties defined in snps,dw-pcie.yaml. -allOf: - - $ref: /schemas/pci/snps,dw-pcie.yaml# - properties: compatible: enum: @@ -61,7 +58,7 @@ properties: - const: pcie - const: pcie_bus - const: pcie_phy - - const: pcie_inbound_axi for imx6sx-pcie, pcie_aux for imx8mq-pcie + - enum: [ pcie_inbound_axi, pcie_aux ] num-lanes: const: 1 @@ -175,6 +172,47 @@ required: - clocks - clock-names +allOf: + - $ref: /schemas/pci/snps,dw-pcie.yaml# + - if: + properties: + compatible: + contains: + const: fsl,imx6sx-pcie + then: + properties: + clock-names: + items: + - {} + - {} + - {} + - const: pcie_inbound_axi + - if: + properties: + compatible: + contains: + const: fsl,imx8mq-pcie + then: + properties: + clock-names: + items: + - {} + - {} + - {} + - const: pcie_aux + - if: + properties: + compatible: + not: + contains: + enum: + - fsl,imx6sx-pcie + - fsl,imx8mq-pcie + then: + properties: + clock-names: + maxItems: 3 + unevaluatedProperties: false examples: