diff mbox series

ina3221: Fix shunt sum critical calculation

Message ID 20221108044508.23463-1-nmalwade@nvidia.com
State Accepted
Commit b8d27d2ce8dfc207e4b67b929a86f2be76fbc6ef
Headers show
Series ina3221: Fix shunt sum critical calculation | expand

Commit Message

Ninad Malwade Nov. 8, 2022, 4:45 a.m. UTC 
The shunt sum critical limit register value should be left shifted
by one bit as its LSB-0 is a reserved bit.

Signed-off-by: Ninad Malwade <nmalwade@nvidia.com>
---
 drivers/hwmon/ina3221.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Guenter Roeck Nov. 11, 2022, 4:27 p.m. UTC | #1 
On Tue, Nov 08, 2022 at 12:45:08PM +0800, Ninad Malwade wrote:
> The shunt sum critical limit register value should be left shifted
> by one bit as its LSB-0 is a reserved bit.
> 
> Signed-off-by: Ninad Malwade <nmalwade@nvidia.com>
> Reviewed-by: Thierry Reding <treding@nvidia.com>

Applied.

Thanks,
Guenter
diff mbox series

Patch

diff --git a/drivers/hwmon/ina3221.c b/drivers/hwmon/ina3221.c
index 2a57f4b60c29..e06186986444 100644
--- a/drivers/hwmon/ina3221.c
+++ b/drivers/hwmon/ina3221.c
@@ -228,7 +228,7 @@  static int ina3221_read_value(struct ina3221_data *ina, unsigned int reg,
 	 * Shunt Voltage Sum register has 14-bit value with 1-bit shift
 	 * Other Shunt Voltage registers have 12 bits with 3-bit shift
 	 */
-	if (reg == INA3221_SHUNT_SUM)
+	if (reg == INA3221_SHUNT_SUM || reg == INA3221_CRIT_SUM)
 		*val = sign_extend32(regval >> 1, 14);
 	else
 		*val = sign_extend32(regval >> 3, 12);
@@ -465,7 +465,7 @@  static int ina3221_write_curr(struct device *dev, u32 attr,
 	 *     SHUNT_SUM: (1 / 40uV) << 1 = 1 / 20uV
 	 *     SHUNT[1-3]: (1 / 40uV) << 3 = 1 / 5uV
 	 */
-	if (reg == INA3221_SHUNT_SUM)
+	if (reg == INA3221_SHUNT_SUM || reg == INA3221_CRIT_SUM)
 		regval = DIV_ROUND_CLOSEST(voltage_uv, 20) & 0xfffe;
 	else
 		regval = DIV_ROUND_CLOSEST(voltage_uv, 5) & 0xfff8;