Message ID | 20221020225135.31750-2-krzysztof.kozlowski@linaro.org |
---|---|
State | Accepted |
Commit | 59e787935cfe6f562fbb9117e2df4076eaf810d8 |
Headers | show |
Series | arm64/pinctrl: dt-bindings: qcom: sc7180: convert to dtschema | expand |
Quoting Krzysztof Kozlowski (2022-10-20 15:51:33) > The Trogdor Homestar DTSI adds additional GPIO52 pin to secondary I2S pins > ("sec_mi2s_active") and configures it to "mi2s_1" function. > > The Trogdor DTSI (which is included by Homestar) configures drive > strength and bias for all "sec_mi2s_active" pins, thus the intention was > to apply this configuration also to GPIO52 on Homestar. > > Reported-by: Doug Anderson <dianders@chromium.org> > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > Fixes: be0416a3f917 ("arm64: dts: qcom: Add sc7180-trogdor-homestar") > Reviewed-by: Douglas Anderson <dianders@chromium.org> > > --- Reviewed-by: Stephen Boyd <swboyd@chromium.org>
diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi index 7fcff4eddd3a..8264b8d5e778 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi @@ -194,6 +194,12 @@ pinmux { pins = "gpio49", "gpio50", "gpio51", "gpio52"; function = "mi2s_1"; }; + + pinconf { + pins = "gpio49", "gpio50", "gpio51", "gpio52"; + drive-strength = <2>; + bias-pull-down; + }; }; &ts_reset_l {