Message ID | 20221018155450.39816-1-krzysztof.kozlowski@linaro.org |
---|---|
State | Accepted |
Commit | 5d76dfb86850893f2506e15a1dc68977c3adc79f |
Headers | show |
Series | [v3,1/3] arm64: dts: qcom: msm8994: Correct SPI10 CS pin | expand |
On Tue, 18 Oct 2022 11:54:48 -0400, Krzysztof Kozlowski wrote: > The GPIO55 is part of SPI10 pins, not its chip-select. Probably the > intention was to use one of dedicated chip-select GPIOs: 47 or 67. > GPIO47 is used for UART2, so choose GPIO67. > > Applied, thanks! [1/3] arm64: dts: qcom: msm8994: Correct SPI10 CS pin commit: 5d76dfb86850893f2506e15a1dc68977c3adc79f [2/3] arm64: dts: qcom: msm8994: Align TLMM pin configuration with DT schema commit: 9d7d01da9a24a8e37fa156d93dbea893a0665f94 Best regards,
diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi b/arch/arm64/boot/dts/qcom/msm8994.dtsi index ded5b7ceeaf9..7a582a5fe3a8 100644 --- a/arch/arm64/boot/dts/qcom/msm8994.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi @@ -897,7 +897,7 @@ default { }; cs { function = "gpio"; - pins = "gpio55"; + pins = "gpio67"; drive-strength = <2>; bias-disable; };
The GPIO55 is part of SPI10 pins, not its chip-select. Probably the intention was to use one of dedicated chip-select GPIOs: 47 or 67. GPIO47 is used for UART2, so choose GPIO67. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- Changes since v2: 1. None Changes since v1: 1. None Not tested on hardware. --- arch/arm64/boot/dts/qcom/msm8994.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)