Message ID | 20221016170035.35014-34-krzysztof.kozlowski@linaro.org |
---|---|
State | Accepted |
Commit | bb65ee4a3c1dc17359d86147288c9e0e65491304 |
Headers | show |
Series | pinctrl/arm64: qcom: continued - fix Qualcomm TLMM pinctrl schema warnings (third set) | expand |
On Sun, 16 Oct 2022 13:00:34 -0400, Krzysztof Kozlowski wrote: > The TLMM pin controller follows generic pin-controller bindings, so > should have subnodes with '-state' and '-pins'. Otherwise the subnodes > (level one and two) are not properly matched. This method also unifies > the bindings with other Qualcomm TLMM and LPASS pinctrl bindings. > > Applied, thanks! [33/34] dt-bindings: pinctrl: qcom,sc7280: fix matching pin config https://git.kernel.org/krzk/linux-dt/c/bb65ee4a3c1dc17359d86147288c9e0e65491304 Best regards,
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml index ad3496784678..4606ca980dc4 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sc7280-pinctrl.yaml @@ -47,9 +47,17 @@ properties: wakeup-parent: true -#PIN CONFIGURATION NODES patternProperties: - '-pins$': + "-state$": + oneOf: + - $ref: "#/$defs/qcom-sc7280-tlmm-state" + - patternProperties: + "-pins$": + $ref: "#/$defs/qcom-sc7280-tlmm-state" + additionalProperties: false + +$defs: + qcom-sc7280-tlmm-state: type: object description: Pinctrl node's client devices use subnodes for desired pin configuration. @@ -162,7 +170,7 @@ examples: gpio-ranges = <&tlmm 0 0 175>; wakeup-parent = <&pdc>; - qup_uart5_default: qup-uart5-pins { + qup_uart5_default: qup-uart5-state { pins = "gpio46", "gpio47"; function = "qup13"; drive-strength = <2>;