| Message ID | 20221013184700.87260-1-krzysztof.kozlowski@linaro.org |
|---|---|
| State | Accepted |
| Commit | 59e787935cfe6f562fbb9117e2df4076eaf810d8 |
| Headers | show |
| Series | [v2,1/3] arm64: dts: qcom: sc7180-trogdor-homestar: fully configure secondary I2S pins | expand |
Hi, On Thu, Oct 13, 2022 at 11:49 AM Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > > The Trogdor Homestar DTSI adds additional GPIO52 pin to secondary I2S pins > ("sec_mi2s_active") and configures it to "mi2s_1" function. > > The Trogdor DTSI (which is included by Homestar) configures drive > strength and bias for all "sec_mi2s_active" pins, thus the intention was > to apply this configuration also to GPIO52 on Homestar. > > Reported-by: Doug Anderson <dianders@chromium.org> > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Fixes: be0416a3f917 ("arm64: dts: qcom: Add sc7180-trogdor-homestar") > --- > > Changes since v1: > 1. New patch > > Not tested on hardware. > > Cc: Doug Anderson <dianders@chromium.org> > --- > arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi > index 1bd6c7dcd9e9..bfab67f4a7c9 100644 > --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi > +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi > @@ -194,6 +194,12 @@ pinmux { > pins = "gpio49", "gpio50", "gpio51", "gpio52"; > function = "mi2s_1"; > }; > + > + pinconf { > + pins = "gpio49", "gpio50", "gpio51", "gpio52"; > + drive-strength = <2>; > + bias-pull-down; > + }; Personally I wouldn't have replicated the "drive-strength" and "bias-pull-down" here (nor would I have replicated the "function = "mi2s_1"" in the node above but I didn't notice it before). ...but it doesn't really hurt, the resulting dtb (after combining all includes) isn't changed, and you've about to clean this up in your next patch. Thus: Reviewed-by: Douglas Anderson <dianders@chromium.org>
diff --git a/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi b/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi index 1bd6c7dcd9e9..bfab67f4a7c9 100644 --- a/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi @@ -194,6 +194,12 @@ pinmux { pins = "gpio49", "gpio50", "gpio51", "gpio52"; function = "mi2s_1"; }; + + pinconf { + pins = "gpio49", "gpio50", "gpio51", "gpio52"; + drive-strength = <2>; + bias-pull-down; + }; }; &ts_reset_l {
The Trogdor Homestar DTSI adds additional GPIO52 pin to secondary I2S pins ("sec_mi2s_active") and configures it to "mi2s_1" function. The Trogdor DTSI (which is included by Homestar) configures drive strength and bias for all "sec_mi2s_active" pins, thus the intention was to apply this configuration also to GPIO52 on Homestar. Reported-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- Changes since v1: 1. New patch Not tested on hardware. Cc: Doug Anderson <dianders@chromium.org> --- arch/arm64/boot/dts/qcom/sc7180-trogdor-homestar.dtsi | 6 ++++++ 1 file changed, 6 insertions(+)