@@ -141,6 +141,9 @@
#define BQ256XX_WATCHDOG_DIS 0
#define BQ256XX_WDT_BIT_SHIFT 4
+#define BQ256XX_BATFET_DISABLE_MASK BIT(5)
+#define BQ256XX_BATFET_DISABLE_BIT_SHIFT 5
+
#define BQ256XX_REG_RST BIT(7)
/**
@@ -259,6 +262,7 @@ struct bq256xx_device {
* @bq256xx_set_iterm: pointer to instance specific set_iterm function
* @bq256xx_set_iprechg: pointer to instance specific set_iprechg function
* @bq256xx_set_vindpm: pointer to instance specific set_vindpm function
+ * @bq256xx_set_online: pointer to instance specific set_online function
*
* @bq256xx_def_ichg: default ichg value in microamps
* @bq256xx_def_iindpm: default iindpm value in microamps
@@ -290,6 +294,7 @@ struct bq256xx_chip_info {
int (*bq256xx_set_iterm)(struct bq256xx_device *bq, int iterm);
int (*bq256xx_set_iprechg)(struct bq256xx_device *bq, int iprechg);
int (*bq256xx_set_vindpm)(struct bq256xx_device *bq, int vindpm);
+ int (*bq256xx_set_online)(struct bq256xx_device *bq, bool online);
int bq256xx_def_ichg;
int bq256xx_def_iindpm;
@@ -425,6 +430,7 @@ static int bq256xx_get_state(struct bq256xx_device *bq,
{
unsigned int charger_status_0;
unsigned int charger_status_1;
+ unsigned int charger_control_3;
int ret;
ret = regmap_read(bq->regmap, BQ256XX_CHARGER_STATUS_0,
@@ -437,9 +443,15 @@ static int bq256xx_get_state(struct bq256xx_device *bq,
if (ret)
return ret;
+ ret = regmap_read(bq->regmap, BQ256XX_CHARGER_CONTROL_3,
+ &charger_control_3);
+ if (ret)
+ return ret;
+
state->vbus_stat = charger_status_0 & BQ256XX_VBUS_STAT_MASK;
state->chrg_stat = charger_status_0 & BQ256XX_CHRG_STAT_MASK;
- state->online = charger_status_0 & BQ256XX_PG_STAT_MASK;
+ state->online = (charger_status_0 & BQ256XX_PG_STAT_MASK)
+ && !(charger_control_3 & BQ256XX_BATFET_DISABLE_MASK);
state->wdt_fault = charger_status_1 & BQ256XX_WDT_FAULT_MASK;
state->bat_fault = charger_status_1 & BQ256XX_BAT_FAULT_MASK;
@@ -702,6 +714,13 @@ static int bq256xx_set_prechrg_curr(struct bq256xx_device *bq, int iprechg)
BQ256XX_IPRECHG_MASK, iprechg_reg_code);
}
+static int bq256xx_set_online(struct bq256xx_device *bq, bool online)
+{
+ return regmap_update_bits(bq->regmap, BQ256XX_CHARGER_CONTROL_3,
+ BQ256XX_BATFET_DISABLE_MASK,
+ (online ? 0 : 1) << BQ256XX_BATFET_DISABLE_BIT_SHIFT);
+}
+
static int bq25618_619_get_prechrg_curr(struct bq256xx_device *bq)
{
unsigned int prechg_and_term_curr_lim;
@@ -915,6 +934,12 @@ static int bq256xx_set_charger_property(struct power_supply *psy,
return ret;
break;
+ case POWER_SUPPLY_PROP_ONLINE:
+ ret = bq->chip_info->bq256xx_set_online(bq, val->intval);
+ if (ret)
+ return ret;
+ break;
+
default:
break;
}
@@ -1197,6 +1222,7 @@ static int bq256xx_property_is_writeable(struct power_supply *psy,
case POWER_SUPPLY_PROP_CHARGE_TERM_CURRENT:
case POWER_SUPPLY_PROP_STATUS:
case POWER_SUPPLY_PROP_INPUT_VOLTAGE_LIMIT:
+ case POWER_SUPPLY_PROP_ONLINE:
return true;
default:
return false;
@@ -1286,6 +1312,7 @@ static const struct bq256xx_chip_info bq256xx_chip_info_tbl[] = {
.bq256xx_set_iterm = bq256xx_set_term_curr,
.bq256xx_set_iprechg = bq256xx_set_prechrg_curr,
.bq256xx_set_vindpm = bq256xx_set_input_volt_lim,
+ .bq256xx_set_online = bq256xx_set_online,
.bq256xx_def_ichg = BQ2560X_ICHG_DEF_uA,
.bq256xx_def_iindpm = BQ256XX_IINDPM_DEF_uA,
@@ -1316,6 +1343,7 @@ static const struct bq256xx_chip_info bq256xx_chip_info_tbl[] = {
.bq256xx_set_iterm = bq256xx_set_term_curr,
.bq256xx_set_iprechg = bq256xx_set_prechrg_curr,
.bq256xx_set_vindpm = bq256xx_set_input_volt_lim,
+ .bq256xx_set_online = bq256xx_set_online,
.bq256xx_def_ichg = BQ2560X_ICHG_DEF_uA,
.bq256xx_def_iindpm = BQ256XX_IINDPM_DEF_uA,
@@ -1346,6 +1374,7 @@ static const struct bq256xx_chip_info bq256xx_chip_info_tbl[] = {
.bq256xx_set_iterm = bq256xx_set_term_curr,
.bq256xx_set_iprechg = bq256xx_set_prechrg_curr,
.bq256xx_set_vindpm = bq256xx_set_input_volt_lim,
+ .bq256xx_set_online = bq256xx_set_online,
.bq256xx_def_ichg = BQ2560X_ICHG_DEF_uA,
.bq256xx_def_iindpm = BQ256XX_IINDPM_DEF_uA,
@@ -1376,6 +1405,7 @@ static const struct bq256xx_chip_info bq256xx_chip_info_tbl[] = {
.bq256xx_set_iterm = bq256xx_set_term_curr,
.bq256xx_set_iprechg = bq256xx_set_prechrg_curr,
.bq256xx_set_vindpm = bq256xx_set_input_volt_lim,
+ .bq256xx_set_online = bq256xx_set_online,
.bq256xx_def_ichg = BQ2560X_ICHG_DEF_uA,
.bq256xx_def_iindpm = BQ256XX_IINDPM_DEF_uA,
@@ -1406,6 +1436,7 @@ static const struct bq256xx_chip_info bq256xx_chip_info_tbl[] = {
.bq256xx_set_iterm = bq256xx_set_term_curr,
.bq256xx_set_iprechg = bq256xx_set_prechrg_curr,
.bq256xx_set_vindpm = bq256xx_set_input_volt_lim,
+ .bq256xx_set_online = bq256xx_set_online,
.bq256xx_def_ichg = BQ25611D_ICHG_DEF_uA,
.bq256xx_def_iindpm = BQ256XX_IINDPM_DEF_uA,
@@ -1436,6 +1467,7 @@ static const struct bq256xx_chip_info bq256xx_chip_info_tbl[] = {
.bq256xx_set_iterm = bq25618_619_set_term_curr,
.bq256xx_set_iprechg = bq25618_619_set_prechrg_curr,
.bq256xx_set_vindpm = bq256xx_set_input_volt_lim,
+ .bq256xx_set_online = bq256xx_set_online,
.bq256xx_def_ichg = BQ25618_ICHG_DEF_uA,
.bq256xx_def_iindpm = BQ256XX_IINDPM_DEF_uA,
@@ -1466,6 +1498,7 @@ static const struct bq256xx_chip_info bq256xx_chip_info_tbl[] = {
.bq256xx_set_iterm = bq25618_619_set_term_curr,
.bq256xx_set_iprechg = bq25618_619_set_prechrg_curr,
.bq256xx_set_vindpm = bq256xx_set_input_volt_lim,
+ .bq256xx_set_online = bq256xx_set_online,
.bq256xx_def_ichg = BQ25618_ICHG_DEF_uA,
.bq256xx_def_iindpm = BQ256XX_IINDPM_DEF_uA,