diff mbox series

[v4,7/9] tty: serial: atmel: Define BRSRCCK bitmask of UART IP's Mode Register

Message ID 20220919150846.1148783-8-sergiu.moga@microchip.com
State New
Headers show
Series [v4,1/9] dt-bindings: mfd: atmel,sama5d2-flexcom: Add SPI child node ref binding | expand

Commit Message

Sergiu Moga Sept. 19, 2022, 3:08 p.m. UTC
Add definitions for the Baud Rate Source Clock bitmask of the
Mode Register of UART IP's and its bitfields.

Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
---


v1 -> v2:
- Nothing, this patch was not here before



v2 -> v3:
- Nothing, previously this was [PATCH 9]



V3 -> v4:
- Nothing, this was previously [PATCH 11]



 drivers/tty/serial/atmel_serial.h | 3 +++
 1 file changed, 3 insertions(+)
diff mbox series

Patch

diff --git a/drivers/tty/serial/atmel_serial.h b/drivers/tty/serial/atmel_serial.h
index 70d0611e56fd..ed64035ba6c3 100644
--- a/drivers/tty/serial/atmel_serial.h
+++ b/drivers/tty/serial/atmel_serial.h
@@ -68,6 +68,9 @@ 
 #define		ATMEL_US_NBSTOP_1		(0 << 12)
 #define		ATMEL_US_NBSTOP_1_5		(1 << 12)
 #define		ATMEL_US_NBSTOP_2		(2 << 12)
+#define	ATMEL_UA_BRSRCCK	GENMASK(13, 12)	/* Clock Selection for UART */
+#define		ATMEL_UA_BRSRCCK_PERIPH_CLK	(0 << 12)
+#define		ATMEL_UA_BRSRCCK_GCLK		(1 << 12)
 #define	ATMEL_US_CHMODE		GENMASK(15, 14)	/* Channel Mode */
 #define		ATMEL_US_CHMODE_NORMAL		(0 << 14)
 #define		ATMEL_US_CHMODE_ECHO		(1 << 14)