@@ -1589,12 +1589,9 @@ void riscv_cpu_do_interrupt(CPUState *cs)
target_ulong mtval2 = 0;
if (cause == RISCV_EXCP_SEMIHOST) {
- if (env->priv >= PRV_S) {
- do_common_semihosting(cs);
- env->pc += 4;
- return;
- }
- cause = RISCV_EXCP_BREAKPOINT;
+ do_common_semihosting(cs);
+ env->pc += 4;
+ return;
}
if (!async) {
@@ -28,6 +28,7 @@
#include "exec/translator.h"
#include "exec/log.h"
+#include "semihosting/semihost.h"
#include "instmap.h"
#include "internals.h"
@@ -52,7 +52,8 @@ static bool trans_ebreak(DisasContext *ctx, arg_ebreak *a)
* that no exception will be raised when fetching them.
*/
- if ((pre_addr & TARGET_PAGE_MASK) == (post_addr & TARGET_PAGE_MASK)) {
+ if (semihosting_enabled(ctx->mem_idx < PRV_S) &&
+ (pre_addr & TARGET_PAGE_MASK) == (post_addr & TARGET_PAGE_MASK)) {
pre = opcode_at(&ctx->base, pre_addr);
ebreak = opcode_at(&ctx->base, ebreak_addr);
post = opcode_at(&ctx->base, post_addr);