| Message ID | 20220909132614.1967276-2-yoshihiro.shimoda.uh@renesas.com |
|---|---|
| State | Accepted |
| Commit | a3b4137a4d4023e6662a2e35579516c7a44bc1cb |
| Headers | show |
| Series | [1/5] clk: renesas: r8a779f0: Add Ethernet Switch clocks | expand |
diff --git a/drivers/clk/renesas/r8a779f0-cpg-mssr.c b/drivers/clk/renesas/r8a779f0-cpg-mssr.c index 4baf355e26d8..304435613723 100644 --- a/drivers/clk/renesas/r8a779f0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779f0-cpg-mssr.c @@ -161,6 +161,8 @@ static const struct mssr_mod_clk r8a779f0_mod_clks[] __initconst = { DEF_MOD("cmt3", 913, R8A779F0_CLK_R), DEF_MOD("pfc0", 915, R8A779F0_CLK_CL16M), DEF_MOD("tsc", 919, R8A779F0_CLK_CL16M), + DEF_MOD("tsn", 1505, R8A779F0_CLK_S0D2_HSC), + DEF_MOD("rsw", 1506, R8A779F0_CLK_RSW2), DEF_MOD("ufs", 1514, R8A779F0_CLK_S0D4_HSC), };
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> --- drivers/clk/renesas/r8a779f0-cpg-mssr.c | 2 ++ 1 file changed, 2 insertions(+)