@@ -362,6 +362,36 @@ i2c3: i2c@40005c00 {
status = "disabled";
};
+ can: can@40006400 {
+ compatible = "st,stm32f4-bxcan-core";
+ reg = <0x40006400 0x800>;
+ resets = <&rcc STM32F4_APB1_RESET(CAN1)>;
+ clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN1)>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ can1: can@0 {
+ compatible = "st,stm32f4-bxcan";
+ reg = <0x0>;
+ interrupts = <19>, <20>, <21>, <22>;
+ interrupt-names = "tx", "rx0", "rx1", "sce";
+ resets = <&rcc STM32F4_APB1_RESET(CAN1)>;
+ st,can-master;
+ status = "disabled";
+ };
+
+ can2: can@400 {
+ compatible = "st,stm32f4-bxcan";
+ reg = <0x400>;
+ interrupts = <63>, <64>, <65>, <66>;
+ interrupt-names = "tx", "rx0", "rx1", "sce";
+ resets = <&rcc STM32F4_APB1_RESET(CAN2)>;
+ clocks = <&rcc 0 STM32F4_APB1_CLOCK(CAN2)>;
+ status = "disabled";
+ };
+ };
+
dac: dac@40007400 {
compatible = "st,stm32f4-dac-core";
reg = <0x40007400 0x400>;