Message ID | 20220812180806.2128593-17-richard.henderson@linaro.org |
---|---|
State | New |
Headers | show
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([2602:ae:154e:e201:a7aa:1d1d:c857:5500]) by smtp.gmail.com with ESMTPSA id h9-20020a056a00000900b0052dee21fecdsm1914761pfk.77.2022.08.12.11.08.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 12 Aug 2022 11:08:27 -0700 (PDT) From: Richard Henderson <richard.henderson@linaro.org> To: qemu-devel@nongnu.org Cc: laurent@vivier.eu, iii@linux.ibm.com, alex.bennee@linaro.org Subject: [PATCH for-7.2 16/21] accel/tcg: Raise PROT_EXEC exception early Date: Fri, 12 Aug 2022 11:08:01 -0700 Message-Id: <20220812180806.2128593-17-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220812180806.2128593-1-richard.henderson@linaro.org> References: <20220812180806.2128593-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::52d; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: <qemu-devel.nongnu.org> List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe> List-Archive: <https://lists.nongnu.org/archive/html/qemu-devel> List-Post: <mailto:qemu-devel@nongnu.org> List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help> List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=subscribe> Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+patch=linaro.org@nongnu.org> |
Series |
accel/tcg: minimize tlb lookups during translate + user-only PROT_EXEC fixes
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expand
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diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 5278d1837b..6a3ca8224f 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -376,7 +376,7 @@ const void *HELPER(lookup_tb_ptr)(CPUArchState *env) cpu_loop_exit(cpu); } - phys_pc = get_page_addr_code(env, pc); + phys_pc = get_page_addr_code_hostp(env, pc, false, NULL); if (phys_pc == -1) { return tcg_code_gen_epilogue; } @@ -509,7 +509,7 @@ void cpu_exec_step_atomic(CPUState *cpu) */ mmap_lock(); - phys_pc = get_page_addr_code_hostp(env, pc, true, &host_pc); + phys_pc = get_page_addr_code_hostp(env, pc, false, &host_pc); if (phys_pc == -1) { tb = NULL; } else { @@ -983,7 +983,7 @@ int cpu_exec(CPUState *cpu) mmap_lock(); phys_pc = get_page_addr_code_hostp(cpu->env_ptr, pc, - true, &host_pc); + false, &host_pc); if (phys_pc == -1) { tb = NULL; } else {
We currently ignore PROT_EXEC on the initial lookup, and defer raising the exception until cpu_ld*_code(). It makes more sense to raise the exception early. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- accel/tcg/cpu-exec.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)