| Message ID | 20220805075503.16983-1-krzysztof.kozlowski@linaro.org |
|---|---|
| State | Accepted |
| Commit | 767470209cedbe2cc72ba38d77c9f096d2c7694c |
| Headers | show |
| Series | [v2] dt-bindings: iio: gyroscope: bosch,bmg160: correct number of pins | expand |
On Mon, 8 Aug 2022 07:48:31 +0200 Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > On 06/08/2022 16:32, Jonathan Cameron wrote: > > On Fri, 5 Aug 2022 09:55:03 +0200 > > Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> wrote: > > > >> BMG160 has two interrupt pins to which interrupts can be freely mapped. > >> Correct the schema to express such case and fix warnings like: > >> > >> qcom/msm8916-alcatel-idol347.dtb: gyroscope@68: interrupts: [[97, 1], [98, 1]] is too long > >> > >> However the basic issue still persists - the interrupts should come in a > >> defined order. > >> > >> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > >> > >> --- > >> > >> Changes since v1: > >> 1. Accept also INT2 as one interrupt (Jonathan). > > > > This doesn't work. If we are going to support either interrupt, at the very least > > we need to require interrupt-names if the first one isn't INT1. So your fix > > is right but not enough. > > > > Driver may ignore interrupt-names for now (would be good to have a sanity check in driver > > though so the driver explicitly checks for INT2 and doesn't use the interrupt if > > it is INT2 - support for that being for a future 'feature' addition). > > > > A hacky solution would be to require the first one to always be INT1 but that > > gives us no (backwards compatible) path forwards if someone does have a board > > where only INT2 is wired. > > > > So minimum change I think will be to provide interrupt-names allowing any of > > INT1 (default if not specified) > > INT1, INT2 > > INT2 > > This is exactly what my fix is doing. What else do you need? > interrupt-names is just a helper which anyway driver does not use, so > enforcing it now does not change much. Ok. I guess this sort of papers over it in a vague fashion and avoids pointing out there that there is breakage in the one interrupt case beyond a hint in the commit message. Better than nothing but only a partial fix for the actual issue (where that issue isn't a binding warning!) Applied to the fixes-togreg branch of iio.git Thanks, Jonathan > > > Best regards, > Krzysztof
diff --git a/Documentation/devicetree/bindings/iio/gyroscope/bosch,bmg160.yaml b/Documentation/devicetree/bindings/iio/gyroscope/bosch,bmg160.yaml index b6bbc312a7cf..1414ba9977c1 100644 --- a/Documentation/devicetree/bindings/iio/gyroscope/bosch,bmg160.yaml +++ b/Documentation/devicetree/bindings/iio/gyroscope/bosch,bmg160.yaml @@ -24,8 +24,10 @@ properties: interrupts: minItems: 1 + maxItems: 2 description: Should be configured with type IRQ_TYPE_EDGE_RISING. + If two interrupts are provided, expected order is INT1 and INT2. required: - compatible
BMG160 has two interrupt pins to which interrupts can be freely mapped. Correct the schema to express such case and fix warnings like: qcom/msm8916-alcatel-idol347.dtb: gyroscope@68: interrupts: [[97, 1], [98, 1]] is too long However the basic issue still persists - the interrupts should come in a defined order. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- Changes since v1: 1. Accept also INT2 as one interrupt (Jonathan). --- .../devicetree/bindings/iio/gyroscope/bosch,bmg160.yaml | 2 ++ 1 file changed, 2 insertions(+)