diff mbox series

[v5,1/2] ASoC: dt-bindings: Add Everest ES8326 audio CODEC

Message ID 20220804091800.744316-1-zhuning0077@gmail.com
State Accepted
Commit 8c6789f4e2d4ee7d6c8c60daa88ea7a4c4cf6779
Headers show
Series [v5,1/2] ASoC: dt-bindings: Add Everest ES8326 audio CODEC | expand

Commit Message

Zhu Ning Aug. 4, 2022, 9:17 a.m. UTC
Add device tree binding documentation for Everest ES8326

Signed-off-by: David Yang <yangxiaohua@everest-semi.com>
Signed-off-by: Zhu Ning <zhuning@everest-semi.com>
----
v5 tested by dtschema
---
 .../bindings/sound/everest,es8326.yaml        | 116 ++++++++++++++++++
 1 file changed, 116 insertions(+)
 create mode 100755 Documentation/devicetree/bindings/sound/everest,es8326.yaml

Comments

Rob Herring (Arm) Aug. 9, 2022, 6:34 p.m. UTC | #1
On Thu, Aug 04, 2022 at 05:17:59PM +0800, Zhu Ning wrote:
> Add device tree binding documentation for Everest ES8326
> 
> Signed-off-by: David Yang <yangxiaohua@everest-semi.com>
> Signed-off-by: Zhu Ning <zhuning@everest-semi.com>
> ----
> v5 tested by dtschema
> ---
>  .../bindings/sound/everest,es8326.yaml        | 116 ++++++++++++++++++
>  1 file changed, 116 insertions(+)
>  create mode 100755 Documentation/devicetree/bindings/sound/everest,es8326.yaml
> 
> diff --git a/Documentation/devicetree/bindings/sound/everest,es8326.yaml b/Documentation/devicetree/bindings/sound/everest,es8326.yaml
> new file mode 100755
> index 000000000000..07781408e788
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/sound/everest,es8326.yaml
> @@ -0,0 +1,116 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/sound/everest,es8326.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Everest ES8326 audio CODEC
> +
> +maintainers:
> +  - David Yang <yangxiaohua@everest-semi.com>
> +
> +properties:
> +  compatible:
> +    const: everest,es8326
> +
> +  reg:
> +    maxItems: 1
> +
> +  clocks:
> +    items:
> +      - description: clock for master clock (MCLK)
> +
> +  clock-names:
> +    items:
> +      - const: mclk
> +
> +  "#sound-dai-cells":
> +    const: 0
> +
> +  everest,jack-pol:
> +    $ref: /schemas/types.yaml#/definitions/uint8
> +    description: |
> +      just the value of reg 57. Bit(3) decides whether the jack polarity is inverted.
> +      Bit(2) decides whether the button on the headset is inverted.
> +      Bit(1)/(0) decides the mic properity to be OMTP/CTIA or auto.
> +    minimum: 0x00
> +    maximum: 0x0f
> +    default: 0x0f
> +
> +  everest,mic1-src:
> +    $ref: /schemas/types.yaml#/definitions/uint8
> +    description:
> +      the value of reg 2A when headset plugged.
> +    minimum: 0x00
> +    maximum: 0x77
> +    default: 0x22
> +
> +  everest,mic2-src:
> +    $ref: /schemas/types.yaml#/definitions/uint8
> +    description:
> +      the value of reg 2A when headset unplugged.
> +    minimum: 0x00
> +    maximum: 0x77
> +    default: 0x44
> +
> +  everest,jack-detect-inverted:
> +    $ref: /schemas/types.yaml#/definitions/flag
> +    description:
> +      Defined to invert the jack detection.

No response to my questions on v3?

Rob
Zhu Ning Aug. 10, 2022, 1:36 a.m. UTC | #2
>> +  everest,jack-detect-inverted:
>> +    description:
>> +      Defined to invert the jack detection.
>
>What's the difference with this and bit 3 of everest,jack-pol?
>
>We already have numerous vendor properties for jack detect. Can we come 
>up with something common?
>
>The problem with 'inverted' is it assumes you know the non-inverted 
>state. Better to just state high or low.

This property is in compatible with the property in es8316.c and sof_essx8336.c.
(which is not documented in es8316.yaml, another problem)
There is a quirk in sof_essx8336.c so that when the user find they're having a 
wrong jack insert configuration, they can set the quirk to invert it.
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/sound/everest,es8326.yaml b/Documentation/devicetree/bindings/sound/everest,es8326.yaml
new file mode 100755
index 000000000000..07781408e788
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/everest,es8326.yaml
@@ -0,0 +1,116 @@ 
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/everest,es8326.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Everest ES8326 audio CODEC
+
+maintainers:
+  - David Yang <yangxiaohua@everest-semi.com>
+
+properties:
+  compatible:
+    const: everest,es8326
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    items:
+      - description: clock for master clock (MCLK)
+
+  clock-names:
+    items:
+      - const: mclk
+
+  "#sound-dai-cells":
+    const: 0
+
+  everest,jack-pol:
+    $ref: /schemas/types.yaml#/definitions/uint8
+    description: |
+      just the value of reg 57. Bit(3) decides whether the jack polarity is inverted.
+      Bit(2) decides whether the button on the headset is inverted.
+      Bit(1)/(0) decides the mic properity to be OMTP/CTIA or auto.
+    minimum: 0x00
+    maximum: 0x0f
+    default: 0x0f
+
+  everest,mic1-src:
+    $ref: /schemas/types.yaml#/definitions/uint8
+    description:
+      the value of reg 2A when headset plugged.
+    minimum: 0x00
+    maximum: 0x77
+    default: 0x22
+
+  everest,mic2-src:
+    $ref: /schemas/types.yaml#/definitions/uint8
+    description:
+      the value of reg 2A when headset unplugged.
+    minimum: 0x00
+    maximum: 0x77
+    default: 0x44
+
+  everest,jack-detect-inverted:
+    $ref: /schemas/types.yaml#/definitions/flag
+    description:
+      Defined to invert the jack detection.
+
+  everest,interrupt-src:
+    $ref: /schemas/types.yaml#/definitions/uint8
+    description: |
+      value of reg 0x58, Defines the interrupt source.
+      Bit(2) 1 means button press triggers irq, 0 means not.
+      Bit(3) 1 means PIN9 is the irq source for jack detection. When set to 0,
+      bias change on PIN9 do not triggers irq.
+      Bit(4) 1 means PIN27 is the irq source for jack detection.
+      Bit(5) 1 means PIN9 is the irq source after MIC detect.
+      Bit(6) 1 means PIN27 is the irq source after MIC detect.
+    minimum: 0
+    maximum: 0x3c
+    default: 0x08
+
+  everest,interrupt-clk:
+    $ref: /schemas/types.yaml#/definitions/uint8
+    description: |
+     value of reg 0x59, Defines the interrupt output behavior.
+     Bit(0-3) 0 means irq pulse equals 512*internal clock
+       1 means irq pulse equals 1024*internal clock
+       2 means ...
+       7 means irq pulse equals 65536*internal clock
+       8 means irq mutes PA
+       9 means irq mutes PA and DAC output
+     Bit(4) 1 means we invert the interrupt output.
+     Bit(6) 1 means the chip do not detect jack type after button released.
+       0 means the chip detect jack type again after button released.
+    minimum: 0
+    maximum: 0x7f
+    default: 0x45
+
+required:
+  - compatible
+  - reg
+  - "#sound-dai-cells"
+
+additionalProperties: false
+
+examples:
+  - |
+    i2c {
+      #address-cells = <1>;
+      #size-cells = <0>;
+      es8326: codec@19 {
+        compatible = "everest,es8326";
+        reg = <0x19>;
+        clocks = <&clks 10>;
+        clock-names = "mclk";
+        #sound-dai-cells = <0>;
+        everest,mic1-src = [22];
+        everest,mic2-src = [44];
+        everest,jack-pol = [0e];
+        everest,interrupt-src = [08];
+        everest,interrupt-clk = [45];
+      };
+    };