@@ -312,7 +312,8 @@ uart0: serial@11002000 {
"mediatek,mt6577-uart";
reg = <0 0x11002000 0 0x400>;
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&clk26m>;
+ clocks = <&pericfg CLK_PERI_UART0_SEL>, <&pericfg CLK_PERI_UART0>;
+ clock-names = "baud", "bus";
status = "disabled";
};
@@ -321,7 +322,8 @@ uart1: serial@11003000 {
"mediatek,mt6577-uart";
reg = <0 0x11003000 0 0x400>;
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&clk26m>;
+ clocks = <&pericfg CLK_PERI_UART1_SEL>, <&pericfg CLK_PERI_UART1>;
+ clock-names = "baud", "bus";
status = "disabled";
};
@@ -330,7 +332,8 @@ uart2: serial@11004000 {
"mediatek,mt6577-uart";
reg = <0 0x11004000 0 0x400>;
interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&clk26m>;
+ clocks = <&pericfg CLK_PERI_UART2_SEL>, <&pericfg CLK_PERI_UART2>;
+ clock-names = "baud", "bus";
status = "disabled";
};
@@ -339,7 +342,8 @@ uart3: serial@11005000 {
"mediatek,mt6577-uart";
reg = <0 0x11005000 0 0x400>;
interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_LOW>;
- clocks = <&clk26m>;
+ clocks = <&pericfg CLK_PERI_UART3_SEL>, <&pericfg CLK_PERI_UART3>;
+ clock-names = "baud", "bus";
status = "disabled";
};
};
The UART nodes had a dummy clock for early bringup, as it is expected that these are left on by the bootloader: now that the pericfg clock controller is supported, we can replace them with the real clocks. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- arch/arm64/boot/dts/mediatek/mt6795.dtsi | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-)