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[V5] dt-bindings: mediatek: Add axi clock in mt8173 dts example

Message ID 20220725120204.10834-1-xiangsheng.hou@mediatek.com
State Accepted
Commit b9320f545e2c91caf2a15f67537ef538928ca6af
Headers show
Series [V5] dt-bindings: mediatek: Add axi clock in mt8173 dts example | expand

Commit Message

Xiangsheng Hou July 25, 2022, 12:02 p.m. UTC 
For mt8173, it is needed to add the axi clock for dma mode.

Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Rob Herring <robh@kernel.org>
 ---
 Changes from v4:
 - none
 
 Changes from v3:
 - fix number of column characters

 Changes from v2:
 - remove assigned clocks and parents in dt-binding

 Changes from v1:
 - none
---
 .../devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml        | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)
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Patch

diff --git a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml
index 41e60fe4b09f..d3d7ed4b497b 100644
--- a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml
+++ b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml
@@ -82,8 +82,9 @@  examples:
         compatible = "mediatek,mt8173-nor";
         reg = <0 0x1100d000 0 0xe0>;
         interrupts = <1>;
-        clocks = <&pericfg CLK_PERI_SPI>, <&topckgen CLK_TOP_SPINFI_IFR_SEL>;
-        clock-names = "spi", "sf";
+        clocks = <&pericfg CLK_PERI_SPI>, <&topckgen CLK_TOP_SPINFI_IFR_SEL>,
+                 <&pericfg CLK_PERI_NFI>;
+        clock-names = "spi", "sf", "axi";
         #address-cells = <1>;
         #size-cells = <0>;