| Message ID | 20220717091609.122968-7-tmaimon77@gmail.com |
|---|---|
| State | Accepted |
| Commit | 8f73a173430b6e5f2968c73f61bbcca4701f9a42 |
| Headers | show |
| Series | Introduce Nuvoton Arbel NPCM8XX BMC SoC | expand |
diff --git a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi index 3696980a3da1..8a2f29016291 100644 --- a/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi +++ b/arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi @@ -110,6 +110,7 @@ rstc: rstc@f0801000 { compatible = "nuvoton,npcm750-reset"; reg = <0xf0801000 0x70>; #reset-cells = <2>; + nuvoton,sysgcr = <&gcr>; }; clk: clock-controller@f0801000 {
Add nuvoton,sysgcr syscon property to the reset node to handle the general control registers. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> --- arch/arm/boot/dts/nuvoton-common-npcm7xx.dtsi | 1 + 1 file changed, 1 insertion(+)