diff mbox series

[v2,6/7] clk: qcom: apss-ipq-pll: update IPQ6018 Alpha PLL config

Message ID 20220711210634.3042092-6-robimarko@gmail.com
State Superseded
Headers show
Series [v2,1/7] clk: qcom: clk-rcg2: add rcg2 mux ops | expand

Commit Message

Robert Marko July 11, 2022, 9:06 p.m. UTC
Update the IPQ6018 Alpha PLL config to the latest one from the downstream
5.4 kernel[1].

This one should match the production SoC-s.

Tested on IPQ6018 CP01-C1 reference board.

[1] https://git.codelinaro.org/clo/qsdk/oss/kernel/linux-ipq-5.4/-/blob/NHSS.QSDK.12.1.r4/drivers/clk/qcom/apss-ipq-pll.c#L41
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
 drivers/clk/qcom/apss-ipq-pll.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)
diff mbox series

Patch

diff --git a/drivers/clk/qcom/apss-ipq-pll.c b/drivers/clk/qcom/apss-ipq-pll.c
index ba77749b16c4..a4016f3854c2 100644
--- a/drivers/clk/qcom/apss-ipq-pll.c
+++ b/drivers/clk/qcom/apss-ipq-pll.c
@@ -39,10 +39,14 @@  static struct clk_alpha_pll ipq_pll = {
 
 static const struct alpha_pll_config ipq6018_pll_config = {
 	.l = 0x37,
-	.config_ctl_val = 0x04141200,
-	.config_ctl_hi_val = 0x0,
+	.config_ctl_val = 0x240d4828,
+	.config_ctl_hi_val = 0x6,
 	.early_output_mask = BIT(3),
+	.aux2_output_mask = BIT(2),
+	.aux_output_mask = BIT(1),
 	.main_output_mask = BIT(0),
+	.test_ctl_val = 0x1c0000C0,
+	.test_ctl_hi_val = 0x4000,
 };
 
 static const struct regmap_config ipq_pll_regmap_config = {