| Message ID | 20220707182314.66610-6-prabhakar.mahadev-lad.rj@bp.renesas.com |
|---|---|
| State | New |
| Headers | show |
| Series | Renesas RZ/G2L IRQC support | expand |
On Thu, Jul 7, 2022 at 8:25 PM <prabhakar.csengg@gmail.com> wrote: > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > Document the required properties to handle GPIO IRQ. > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> > Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Is this already queued in Marc's branch targeted for next so I don't need to do anything with the pinctrl patches? Yours, Linus Walleij
Hi Geert, Linus, On Mon, Jul 11, 2022 at 12:51 PM Geert Uytterhoeven <geert@linux-m68k.org> wrote: > > Hi Linus, > > On Mon, Jul 11, 2022 at 1:36 PM Linus Walleij <linus.walleij@linaro.org> wrote: > > On Thu, Jul 7, 2022 at 8:25 PM <prabhakar.csengg@gmail.com> wrote: > > > > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > > > > > Document the required properties to handle GPIO IRQ. > > > > > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> > > > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> > > > Reviewed-by: Rob Herring <robh@kernel.org> > > > > Acked-by: Linus Walleij <linus.walleij@linaro.org> > > > > Is this already queued in Marc's branch targeted for next > > so I don't need to do anything with the pinctrl patches? > > I don't know; I was wondering the same thing ;-) > > The gitweb link in the bot email does not work: > > Commit-ID: 35c37efd12733d8ddbdc11ab9c8dbcee472a487f > Gitweb: > https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/35c37efd12733d8ddbdc11ab9c8dbcee472a487f > > The actual commit seems to exist in that repo, but using the web > interface, it is difficult to find out to which branch it belongs. > This patch (and all the patches of this series) is part of irqchip-next branch [0]. [0] https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/log/?h=irq/irqchip-next Cheers, Prabhakar > It is also not part of next-20220711. > > Anyway, it's too late for me to take the pinctrl parts for v5.20 (saw > no ack from Marc before the bot emails), so if it finds a different > path upstream, I'm happy ;-) > > Gr{oetje,eeting}s, > > Geert > > -- > Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org > > In personal conversations with technical people, I call myself a hacker. But > when I'm talking to journalists I just say "programmer" or something like that. > -- Linus Torvalds
diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml index 52df1b146174..997b74639112 100644 --- a/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/renesas,rzg2l-pinctrl.yaml @@ -47,6 +47,17 @@ properties: gpio-ranges: maxItems: 1 + interrupt-controller: true + + '#interrupt-cells': + const: 2 + description: + The first cell contains the global GPIO port index, constructed using the + RZG2L_GPIO() helper macro in <dt-bindings/pinctrl/rzg2l-pinctrl.h> and the + second cell is used to specify the flag. + E.g. "interrupts = <RZG2L_GPIO(43, 0) IRQ_TYPE_EDGE_FALLING>;" if P43_0 is + being used as an interrupt. + clocks: maxItems: 1 @@ -110,6 +121,8 @@ required: - gpio-controller - '#gpio-cells' - gpio-ranges + - interrupt-controller + - '#interrupt-cells' - clocks - power-domains - resets @@ -126,6 +139,8 @@ examples: gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pinctrl 0 0 392>; + interrupt-controller; + #interrupt-cells = <2>; clocks = <&cpg CPG_MOD R9A07G044_GPIO_HCLK>; resets = <&cpg R9A07G044_GPIO_RSTN>, <&cpg R9A07G044_GPIO_PORT_RESETN>,