Message ID | 1656072327-13628-9-git-send-email-manikanta.guntupalli@xilinx.com |
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State | New |
Headers | show
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Fri, 24 Jun 2022 05:07:18 -0700 Envelope-to: git@amd.com, michal.simek@amd.com, linux-arm-kernel@lists.infradead.org, linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org Received: from [172.23.64.2] (port=47737 helo=xhdvnc102.xilinx.com) by smtp.xilinx.com with esmtp (Exim 4.90) (envelope-from <manikanta.guntupalli@xilinx.com>) id 1o4i5m-0005OP-DX; Fri, 24 Jun 2022 05:07:18 -0700 Received: by xhdvnc102.xilinx.com (Postfix, from userid 90444) id 7362210454B; Fri, 24 Jun 2022 17:35:52 +0530 (IST) From: Manikanta Guntupalli <manikanta.guntupalli@xilinx.com> To: <michal.simek@xilinx.com>, <michal.simek@amd.com>, <linux-arm-kernel@lists.infradead.org>, <linux-i2c@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <git@amd.com> CC: Raviteja Narayanam <raviteja.narayanam@xilinx.com>, Manikanta Guntupalli <manikanta.guntupalli@xilinx.com> Subject: [PATCH 08/12] i2c: xiic: Remove interrupt enable/disable in Rx path Date: Fri, 24 Jun 2022 17:35:23 +0530 Message-ID: <1656072327-13628-9-git-send-email-manikanta.guntupalli@xilinx.com> X-Mailer: git-send-email 2.1.1 In-Reply-To: <1656072327-13628-1-git-send-email-manikanta.guntupalli@xilinx.com> References: <1656072327-13628-1-git-send-email-manikanta.guntupalli@xilinx.com> MIME-Version: 1.0 Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 16833a2a-5a4a-4290-5dd1-08da55da165c X-MS-TrafficTypeDiagnostic: CO6PR02MB8771:EE_ X-Auto-Response-Suppress: DR, RN, NRN, OOF, AutoReply X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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i2c: xiic: Added Standard mode and SMBus
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expand
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diff --git a/drivers/i2c/busses/i2c-xiic.c b/drivers/i2c/busses/i2c-xiic.c index 74cd50478694..720aa671f74b 100644 --- a/drivers/i2c/busses/i2c-xiic.c +++ b/drivers/i2c/busses/i2c-xiic.c @@ -776,7 +776,6 @@ static void xiic_start_recv(struct xiic_i2c *i2c) u16 rx_watermark; u8 cr = 0, rfd_set = 0; struct i2c_msg *msg = i2c->rx_msg = i2c->tx_msg; - unsigned long flags; dev_dbg(i2c->adap.dev.parent, "%s entry, ISR: 0x%x, CR: 0x%x\n", __func__, xiic_getreg32(i2c, XIIC_IISR_OFFSET), @@ -808,7 +807,6 @@ static void xiic_start_recv(struct xiic_i2c *i2c) xiic_setreg8(i2c, XIIC_RFD_REG_OFFSET, bytes); - local_irq_save(flags); if (!(msg->flags & I2C_M_NOSTART)) /* write the address */ xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET, @@ -822,7 +820,6 @@ static void xiic_start_recv(struct xiic_i2c *i2c) val |= msg->len; xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET, val); - local_irq_restore(flags); } else { /* * If previous message is Tx, make sure that Tx FIFO is empty