@@ -165,6 +165,19 @@
};
};
+ crypto: crypto@40900000 {
+ compatible = "ti,am62-sa3ul";
+ reg = <0x00 0x40900000 0x00 0x1200>;
+ power-domains = <&k3_pds 70 TI_SCI_PD_EXCLUSIVE>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges = <0x00 0x40900000 0x00 0x40900000 0x00 0x30000>;
+
+ dmas = <&main_pktdma 0xf501 0>, <&main_pktdma 0x7506 0>,
+ <&main_pktdma 0x7507 0>;
+ dma-names = "tx", "rx1", "rx2";
+ };
+
main_pmx0: pinctrl@f4000 {
compatible = "pinctrl-single";
reg = <0x00 0xf4000 0x00 0x2ac>;
Add the node for sa3ul crypto accelerator. Signed-off-by: Jayesh Choudhary <j-choudhary@ti.com> --- On local testing, crypto self-tests and tcrypt tests were passing for SHA256, SHA512, ECB-AES and CBC-AES algorithms. RNG node has not been added due to the indirect access of the hardware random number generator from OP-TEE. arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+)