diff mbox

FW: Commit 81a43adae3b9 (locking/mutex: Use acquire/release semantics) causing failures on arm64 (ThunderX)

Message ID 20151211120419.GD18828@arm.com
State New
Headers show

Commit Message

Will Deacon Dec. 11, 2015, 12:04 p.m. UTC
Hi all,

On Fri, Dec 11, 2015 at 09:41:33AM +0100, Peter Zijlstra wrote:
> On Thu, Dec 10, 2015 at 08:51:34PM -0800, Andrew Pinski wrote:

> 

> > So looking further I think I understand what is going wrong and why

> > c55a6ffa6285e29f874ed403979472631ec70bff is incorrect.

> 

> The osq_wait_next() call in osq_lock() is when we fail the lock. This is

> effectively trylock() semantics and like for cmpxchg a failed trylock

> has no implied barrier semantics.  So from that POV osq_wait_next() does

> not need to provide ACQUIRE semantics.

> 

> In osq_unlock() there's an xchg() in front, which implies full barriers

> and thereby provides RELEASE semantics for that part of osq_unlock(), so

> again, from this POV osq_wait_next() does not need to provide RELEASE

> semantics.

> 

> > The compare and swap inside osq_lock needs to be both release and

> > acquire semantics memory barriers because the stores (to node) need to

> > be visible to the other cores before the setting of lock->tail

> > happens.

> 

> I'm a wee bit confused on what exactly you mean. Both stores to @node:

> 

>  1) osq_wait_next(): next = xchg(&node->next, NULL)

>  2) osq_unlock():    next = xchg(&node->next, NULL)

> 

> are xchg() calls which imply full ordering (sequential consistency).


I think Andrew meant the atomic_xchg_acquire at the start of osq_lock,
as opposed to "compare and swap". In which case, it does look like
there's a bug here because there is nothing to order the initialisation
of the node fields with publishing of the node, whether that's
indirectly as a result of setting the tail to the current CPU or
directly as a result of the WRITE_ONCE.

Andrew, David: does making that atomic_xchg_acquire and atomic_xchg
fix things for you?

I don't fully grok what 81a43adae3b9 has to do with any of this, so
maybe there's another bug too.

Will

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Comments

Will Deacon Dec. 11, 2015, 12:18 p.m. UTC | #1
On Fri, Dec 11, 2015 at 01:13:19PM +0100, Peter Zijlstra wrote:
> On Fri, Dec 11, 2015 at 12:04:19PM +0000, Will Deacon wrote:

> > I think Andrew meant the atomic_xchg_acquire at the start of osq_lock,

> > as opposed to "compare and swap". In which case, it does look like

> > there's a bug here because there is nothing to order the initialisation

> > of the node fields with publishing of the node, whether that's

> > indirectly as a result of setting the tail to the current CPU or

> > directly as a result of the WRITE_ONCE.

> 

> Agreed, this does indeed look like a bug. If confirmed please write a

> shiny changelog and I'll queue asap.


Yup. I've failed to reproduce the issue locally, so we'll need to wait
for Andrew and/or David to get back to us first.

Will

> > diff --git a/kernel/locking/osq_lock.c b/kernel/locking/osq_lock.c

> > index d092a0c9c2d4..05a37857ab55 100644

> > --- a/kernel/locking/osq_lock.c

> > +++ b/kernel/locking/osq_lock.c

> > @@ -93,10 +93,12 @@ bool osq_lock(struct optimistic_spin_queue *lock)

> >  	node->cpu = curr;

> >  

> >  	/*

> > -	 * ACQUIRE semantics, pairs with corresponding RELEASE

> > -	 * in unlock() uncontended, or fastpath.

> > +	 * We need both ACQUIRE (pairs with corresponding RELEASE in

> > +	 * unlock() uncontended, or fastpath) and RELEASE (to publish

> > +	 * the node fields we just initialised) semantics when updating

> > +	 * the lock tail.

> >  	 */

> > -	old = atomic_xchg_acquire(&lock->tail, curr);

> > +	old = atomic_xchg(&lock->tail, curr);

> >  	if (old == OSQ_UNLOCKED_VAL)

> >  		return true;

> >  

> 

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Will Deacon Dec. 11, 2015, 1:33 p.m. UTC | #2
On Fri, Dec 11, 2015 at 01:26:47PM +0100, Peter Zijlstra wrote:
> On Fri, Dec 11, 2015 at 12:18:00PM +0000, Will Deacon wrote:

> > On Fri, Dec 11, 2015 at 01:13:19PM +0100, Peter Zijlstra wrote:

> > > On Fri, Dec 11, 2015 at 12:04:19PM +0000, Will Deacon wrote:

> > > > I think Andrew meant the atomic_xchg_acquire at the start of osq_lock,

> > > > as opposed to "compare and swap". In which case, it does look like

> > > > there's a bug here because there is nothing to order the initialisation

> > > > of the node fields with publishing of the node, whether that's

> > > > indirectly as a result of setting the tail to the current CPU or

> > > > directly as a result of the WRITE_ONCE.

> > > 

> > > Agreed, this does indeed look like a bug. If confirmed please write a

> > > shiny changelog and I'll queue asap.

> > 

> > Yup. I've failed to reproduce the issue locally, so we'll need to wait

> > for Andrew and/or David to get back to us first.

> 

> While we're there, the acquire in osq_wait_next() seems somewhat ill

> documented too.

> 

> I _think_ we need ACQUIRE semantics there because we want to strictly

> order the lock-unqueue A,B,C steps and we get that with:

> 

>  A: SC

>  B: ACQ

>  C: Relaxed

> 

> Similarly for unlock we want the WRITE_ONCE to happen after

> osq_wait_next, but in that case we can even rely on the control

> dependency there.


Even for the lock-unqueue case, isn't B->C ordered by a control dependency
because C consists only of stores?

Will
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Will Deacon Dec. 11, 2015, 2:06 p.m. UTC | #3
On Fri, Dec 11, 2015 at 02:48:03PM +0100, Peter Zijlstra wrote:
> On Fri, Dec 11, 2015 at 01:33:14PM +0000, Will Deacon wrote:

> > On Fri, Dec 11, 2015 at 01:26:47PM +0100, Peter Zijlstra wrote:

> 

> > > While we're there, the acquire in osq_wait_next() seems somewhat ill

> > > documented too.

> > > 

> > > I _think_ we need ACQUIRE semantics there because we want to strictly

> > > order the lock-unqueue A,B,C steps and we get that with:

> > > 

> > >  A: SC

> > >  B: ACQ

> > >  C: Relaxed

> > > 

> > > Similarly for unlock we want the WRITE_ONCE to happen after

> > > osq_wait_next, but in that case we can even rely on the control

> > > dependency there.

> > 

> > Even for the lock-unqueue case, isn't B->C ordered by a control dependency

> > because C consists only of stores?

> 

> Hmm, indeed. So we could go fully relaxed on it I suppose, since the

> same is true for the unlock site.


In which case, we should be able to relax the xchg in there (osq_wait_next)
too, right?

Will
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Will Deacon Dec. 11, 2015, 5:24 p.m. UTC | #4
On Fri, Dec 11, 2015 at 06:11:28PM +0100, Peter Zijlstra wrote:
> On Fri, Dec 11, 2015 at 02:06:49PM +0000, Will Deacon wrote:

> > On Fri, Dec 11, 2015 at 02:48:03PM +0100, Peter Zijlstra wrote:

> > > On Fri, Dec 11, 2015 at 01:33:14PM +0000, Will Deacon wrote:

> > > > On Fri, Dec 11, 2015 at 01:26:47PM +0100, Peter Zijlstra wrote:

> > > 

> > > > > While we're there, the acquire in osq_wait_next() seems somewhat ill

> > > > > documented too.

> > > > > 

> > > > > I _think_ we need ACQUIRE semantics there because we want to strictly

> > > > > order the lock-unqueue A,B,C steps and we get that with:

> > > > > 

> > > > >  A: SC

> > > > >  B: ACQ

> > > > >  C: Relaxed

> > > > > 

> > > > > Similarly for unlock we want the WRITE_ONCE to happen after

> > > > > osq_wait_next, but in that case we can even rely on the control

> > > > > dependency there.

> > > > 

> > > > Even for the lock-unqueue case, isn't B->C ordered by a control dependency

> > > > because C consists only of stores?

> > > 

> > > Hmm, indeed. So we could go fully relaxed on it I suppose, since the

> > > same is true for the unlock site.

> > 

> > In which case, we should be able to relax the xchg in there (osq_wait_next)

> > too, right?

> 

> Can I have second thoughts an confuse matters again? ;-)

> 

> A RmW-acq is a load-acquire+store. That means the store is _after_ the

> load and thus not required for the completion of the control dependency.

> 

> Therefore the store in question can reorder inside the conditional

> control block's stores.

> 

> Hmm?


Ah yeah, it's the same thing we were discussing the other day! Whilst
there is a form of control dependency from the SC part of the LL/SC
sequence, it doesn't guarantee ordering in the same way that a
load->store control dependency does. That is, it orders subsequent
writes to be afterwards in the coherence order but it doesn't ensure
multi-copy atomicity for readers.

Now, in this case, &lock->tail is only ever accessed by other cmpxchg
operations, so I think it does actually work using just the control
dependency. Worst case, a concurrent osq_wait_next gets a stale value
in the atomic_read, but that's not a correctness problem.

Will
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diff mbox

Patch

diff --git a/kernel/locking/osq_lock.c b/kernel/locking/osq_lock.c
index d092a0c9c2d4..05a37857ab55 100644
--- a/kernel/locking/osq_lock.c
+++ b/kernel/locking/osq_lock.c
@@ -93,10 +93,12 @@  bool osq_lock(struct optimistic_spin_queue *lock)
 	node->cpu = curr;
 
 	/*
-	 * ACQUIRE semantics, pairs with corresponding RELEASE
-	 * in unlock() uncontended, or fastpath.
+	 * We need both ACQUIRE (pairs with corresponding RELEASE in
+	 * unlock() uncontended, or fastpath) and RELEASE (to publish
+	 * the node fields we just initialised) semantics when updating
+	 * the lock tail.
 	 */
-	old = atomic_xchg_acquire(&lock->tail, curr);
+	old = atomic_xchg(&lock->tail, curr);
 	if (old == OSQ_UNLOCKED_VAL)
 		return true;