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[2/2] MAINTAINERS: add spi to PolarFire SoC entry

Message ID 20220607073833.2331539-3-conor.dooley@microchip.com
State Accepted
Commit f303c6b26cede1aa137dc3e10eee78a80cde9999
Headers show
Series Add support for PolarFire SoC's spi controllers | expand

Commit Message

Conor Dooley June 7, 2022, 7:38 a.m. UTC
Add the newly introduced spi driver to the existing PolarFire SoC entry.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
 MAINTAINERS | 1 +
 1 file changed, 1 insertion(+)
diff mbox series

Patch

diff --git a/MAINTAINERS b/MAINTAINERS
index f468864fd268..279a25065942 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -16955,6 +16955,7 @@  S:	Supported
 F:	arch/riscv/boot/dts/microchip/
 F:	drivers/mailbox/mailbox-mpfs.c
 F:	drivers/soc/microchip/
+F:	drivers/spi/spi-microchip-core.c
 F:	include/soc/microchip/mpfs.h
 
 RNBD BLOCK DRIVERS