| Message ID | 20220601233743.56317-2-virag.david003@gmail.com |
|---|---|
| State | New |
| Headers | show |
| Series | Bring up internal eMMC on Samsung Galaxy A8 (2018) | expand |
On 02/06/2022 01:37, David Virag wrote: > CMU_FSYS clock domain provides clocks for MMC (MMC_CARD, MMC_EMBD, > MMC_SDIO), and USB30DRD. > > Add clock indices and bindings documentation for CMU_FSYS domain. > > Signed-off-by: David Virag <virag.david003@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
On 02/06/2022 01:37, David Virag wrote: > CMU_FSYS clock domain provides clocks for MMC (MMC_CARD, MMC_EMBD, > MMC_SDIO), and USB30DRD. > > Add clock indices and bindings documentation for CMU_FSYS domain. > > Signed-off-by: David Virag <virag.david003@gmail.com> > --- > .../clock/samsung,exynos7885-clock.yaml | 27 ++++++++++++++++ > include/dt-bindings/clock/exynos7885.h | 31 ++++++++++++++++++- It seems the clock IDs from bindings are used by both driver and DTS. Sylwester, can I take them to Samsung Soc and send you a pull request? Best regards, Krzysztof
On 02.06.2022 01:37, David Virag wrote: > CMU_FSYS clock domain provides clocks for MMC (MMC_CARD, MMC_EMBD, > MMC_SDIO), and USB30DRD. > > Add clock indices and bindings documentation for CMU_FSYS domain. > > Signed-off-by: David Virag <virag.david003@gmail.com> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
On 08.06.2022 17:12, Krzysztof Kozlowski wrote: > On 02/06/2022 01:37, David Virag wrote: >> CMU_FSYS clock domain provides clocks for MMC (MMC_CARD, MMC_EMBD, >> MMC_SDIO), and USB30DRD. >> >> Add clock indices and bindings documentation for CMU_FSYS domain. >> >> Signed-off-by: David Virag <virag.david003@gmail.com> >> --- >> .../clock/samsung,exynos7885-clock.yaml | 27 ++++++++++++++++ >> include/dt-bindings/clock/exynos7885.h | 31 ++++++++++++++++++- > It seems the clock IDs from bindings are used by both driver and DTS. > Sylwester, can I take them to Samsung Soc and send you a pull request? Sure, let's do it that way.
On Thu, 2 Jun 2022 01:37:39 +0200, David Virag wrote: > CMU_FSYS clock domain provides clocks for MMC (MMC_CARD, MMC_EMBD, > MMC_SDIO), and USB30DRD. > > Add clock indices and bindings documentation for CMU_FSYS domain. > > Applied, thanks! [1/5] dt-bindings: clock: Add bindings for Exynos7885 CMU_FSYS https://git.kernel.org/krzk/linux/c/cd268e309c29e9a8b15a47f684d848c1d57fe150 Best regards,
diff --git a/Documentation/devicetree/bindings/clock/samsung,exynos7885-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynos7885-clock.yaml index 5073e569a47f..006d33a9e0f1 100644 --- a/Documentation/devicetree/bindings/clock/samsung,exynos7885-clock.yaml +++ b/Documentation/devicetree/bindings/clock/samsung,exynos7885-clock.yaml @@ -33,6 +33,7 @@ properties: enum: - samsung,exynos7885-cmu-top - samsung,exynos7885-cmu-core + - samsung,exynos7885-cmu-fsys - samsung,exynos7885-cmu-peri clocks: @@ -88,6 +89,32 @@ allOf: - const: dout_core_cci - const: dout_core_g3d + - if: + properties: + compatible: + contains: + const: samsung,exynos7885-cmu-fsys + + then: + properties: + clocks: + items: + - description: External reference clock (26 MHz) + - description: CMU_FSYS bus clock (from CMU_TOP) + - description: MMC_CARD clock (from CMU_TOP) + - description: MMC_EMBD clock (from CMU_TOP) + - description: MMC_SDIO clock (from CMU_TOP) + - description: USB30DRD clock (from CMU_TOP) + + clock-names: + items: + - const: oscclk + - const: dout_fsys_bus + - const: dout_fsys_mmc_card + - const: dout_fsys_mmc_embd + - const: dout_fsys_mmc_sdio + - const: dout_fsys_usb30drd + - if: properties: compatible: diff --git a/include/dt-bindings/clock/exynos7885.h b/include/dt-bindings/clock/exynos7885.h index 1f8701691d62..d2e1483f93e4 100644 --- a/include/dt-bindings/clock/exynos7885.h +++ b/include/dt-bindings/clock/exynos7885.h @@ -54,7 +54,22 @@ #define CLK_GOUT_PERI_USI0 43 #define CLK_GOUT_PERI_USI1 44 #define CLK_GOUT_PERI_USI2 45 -#define TOP_NR_CLK 46 +#define CLK_MOUT_FSYS_BUS 46 +#define CLK_MOUT_FSYS_MMC_CARD 47 +#define CLK_MOUT_FSYS_MMC_EMBD 48 +#define CLK_MOUT_FSYS_MMC_SDIO 49 +#define CLK_MOUT_FSYS_USB30DRD 50 +#define CLK_DOUT_FSYS_BUS 51 +#define CLK_DOUT_FSYS_MMC_CARD 52 +#define CLK_DOUT_FSYS_MMC_EMBD 53 +#define CLK_DOUT_FSYS_MMC_SDIO 54 +#define CLK_DOUT_FSYS_USB30DRD 55 +#define CLK_GOUT_FSYS_BUS 56 +#define CLK_GOUT_FSYS_MMC_CARD 57 +#define CLK_GOUT_FSYS_MMC_EMBD 58 +#define CLK_GOUT_FSYS_MMC_SDIO 59 +#define CLK_GOUT_FSYS_USB30DRD 60 +#define TOP_NR_CLK 61 /* CMU_CORE */ #define CLK_MOUT_CORE_BUS_USER 1 @@ -112,4 +127,18 @@ #define CLK_GOUT_WDT1_PCLK 43 #define PERI_NR_CLK 44 +/* CMU_FSYS */ +#define CLK_MOUT_FSYS_BUS_USER 1 +#define CLK_MOUT_FSYS_MMC_CARD_USER 2 +#define CLK_MOUT_FSYS_MMC_EMBD_USER 3 +#define CLK_MOUT_FSYS_MMC_SDIO_USER 4 +#define CLK_MOUT_FSYS_USB30DRD_USER 4 +#define CLK_GOUT_MMC_CARD_ACLK 5 +#define CLK_GOUT_MMC_CARD_SDCLKIN 6 +#define CLK_GOUT_MMC_EMBD_ACLK 7 +#define CLK_GOUT_MMC_EMBD_SDCLKIN 8 +#define CLK_GOUT_MMC_SDIO_ACLK 9 +#define CLK_GOUT_MMC_SDIO_SDCLKIN 10 +#define FSYS_NR_CLK 11 + #endif /* _DT_BINDINGS_CLOCK_EXYNOS_7885_H */
CMU_FSYS clock domain provides clocks for MMC (MMC_CARD, MMC_EMBD, MMC_SDIO), and USB30DRD. Add clock indices and bindings documentation for CMU_FSYS domain. Signed-off-by: David Virag <virag.david003@gmail.com> --- .../clock/samsung,exynos7885-clock.yaml | 27 ++++++++++++++++ include/dt-bindings/clock/exynos7885.h | 31 ++++++++++++++++++- 2 files changed, 57 insertions(+), 1 deletion(-)