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[PULL,083/117] target/arm: Implement NOT (prediates) alias

Message ID 20220530160708.726466-84-peter.maydell@linaro.org
State Accepted
Commit 738b679cc961bd086f14d7d7e3f4be116a719810
Headers show
Series [PULL,001/117] docs/system/arm: Add FEAT_HCX to list of emulated features | expand

Commit Message

Peter Maydell May 30, 2022, 4:06 p.m. UTC 
From: Richard Henderson <richard.henderson@linaro.org>

This alias is defined on EOR (prediates).  While the
same operation could be performed with NAND or NOR,
only bother with the official alias.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220527181907.189259-81-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 target/arm/translate-sve.c | 5 +++++
 1 file changed, 5 insertions(+)
diff mbox series

Patch

diff --git a/target/arm/translate-sve.c b/target/arm/translate-sve.c
index f33bc9d480b..b6b5980e2db 100644
--- a/target/arm/translate-sve.c
+++ b/target/arm/translate-sve.c
@@ -1381,6 +1381,11 @@  static bool trans_EOR_pppp(DisasContext *s, arg_rprr_s *a)
         .fno = gen_helper_sve_eor_pppp,
         .prefer_i64 = TCG_TARGET_REG_BITS == 64,
     };
+
+    /* Alias NOT (predicate) is EOR Pd.B, Pg/Z, Pn.B, Pg.B */
+    if (!a->s && a->pg == a->rm) {
+        return gen_gvec_fn_ppp(s, tcg_gen_gvec_andc, a->rd, a->pg, a->rn);
+    }
     return do_pppp_flags(s, a, &op);
 }