diff mbox series

[v2,7/7] target/arm: Add el_is_in_host

Message ID 20220517054850.177016-8-richard.henderson@linaro.org
State Superseded
Headers show
Series target/arm: SME prep patches | expand

Commit Message

Richard Henderson May 17, 2022, 5:48 a.m. UTC
This (newish) ARM pseudocode function is easier to work with
than open-coded tests for HCR_E2H etc.  Use of the function
will be staged into the code base in parts.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/internals.h |  2 ++
 target/arm/helper.c    | 23 +++++++++++++++++++++++
 2 files changed, 25 insertions(+)

Comments

Peter Maydell May 19, 2022, 11:39 a.m. UTC | #1
On Tue, 17 May 2022 at 07:05, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> This (newish) ARM pseudocode function is easier to work with
> than open-coded tests for HCR_E2H etc.  Use of the function
> will be staged into the code base in parts.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>  target/arm/internals.h |  2 ++
>  target/arm/helper.c    | 23 +++++++++++++++++++++++
>  2 files changed, 25 insertions(+)
> +/*
> + * Corresponds to ARM pseudocode function ELIsInHost().
> + */
> +bool el_is_in_host(CPUARMState *env, int el)
> +{
> +    uint64_t mask;
> +    /*
> +     * Since we only care about E2H and TGE, we can skip arm_hcr_el2_eff.
> +     * Perform the simplest bit tests first, and validate EL2 afterward.
> +     */
> +    if (el & 1) {
> +        return false; /* EL1 or EL3 */
> +    }
> +
> +    mask = el ? HCR_E2H : HCR_E2H | HCR_TGE;
> +    if ((env->cp15.hcr_el2 & mask) != mask) {
> +        return false;
> +    }
> +
> +    /* TGE and/or E2H set: double check those bits are currently legal. */
> +    return arm_is_el2_enabled(env) && arm_el_is_aa64(env, 2);
> +}

What about the HaveVirtHostExt() check ?

Otherwise, looks like it matches the pseudocode, but I'd
rather wait until we have some uses of the function before
I think too hard about it.

thanks
-- PMM
Richard Henderson May 19, 2022, 3:04 p.m. UTC | #2
On 5/19/22 04:39, Peter Maydell wrote:
>> +    mask = el ? HCR_E2H : HCR_E2H | HCR_TGE;
>> +    if ((env->cp15.hcr_el2 & mask) != mask) {
>> +        return false;
>> +    }
>> +
>> +    /* TGE and/or E2H set: double check those bits are currently legal. */
>> +    return arm_is_el2_enabled(env) && arm_el_is_aa64(env, 2);
>> +}
> 
> What about the HaveVirtHostExt() check ?

Handled by do_hcr_write, in not letting E2H be set.
Will add a comment.


r~
diff mbox series

Patch

diff --git a/target/arm/internals.h b/target/arm/internals.h
index 4165d49570..58392c8246 100644
--- a/target/arm/internals.h
+++ b/target/arm/internals.h
@@ -1310,6 +1310,8 @@  static inline void define_cortex_a72_a57_a53_cp_reginfo(ARMCPU *cpu) { }
 void define_cortex_a72_a57_a53_cp_reginfo(ARMCPU *cpu);
 #endif
 
+bool el_is_in_host(CPUARMState *env, int el);
+
 void aa32_max_features(ARMCPU *cpu);
 
 /* Powers of 2 for sve_vq_map et al. */
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 05baa73986..d082a1cf18 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -5282,6 +5282,29 @@  uint64_t arm_hcr_el2_eff(CPUARMState *env)
     return ret;
 }
 
+/*
+ * Corresponds to ARM pseudocode function ELIsInHost().
+ */
+bool el_is_in_host(CPUARMState *env, int el)
+{
+    uint64_t mask;
+    /*
+     * Since we only care about E2H and TGE, we can skip arm_hcr_el2_eff.
+     * Perform the simplest bit tests first, and validate EL2 afterward.
+     */
+    if (el & 1) {
+        return false; /* EL1 or EL3 */
+    }
+
+    mask = el ? HCR_E2H : HCR_E2H | HCR_TGE;
+    if ((env->cp15.hcr_el2 & mask) != mask) {
+        return false;
+    }
+
+    /* TGE and/or E2H set: double check those bits are currently legal. */
+    return arm_is_el2_enabled(env) && arm_el_is_aa64(env, 2);
+}
+
 static void hcrx_write(CPUARMState *env, const ARMCPRegInfo *ri,
                        uint64_t value)
 {