| Message ID | 20220513105850.310375-4-herve.codina@bootlin.com |
|---|---|
| State | New |
| Headers | show |
| Series | Microchip LAN966x USB device support | expand |
Hello! On 5/13/22 1:58 PM, Herve Codina wrote: > Add UDPHS (the USB High Speed Device Port controller) support. > The UDPHS IP present in the lan966x SOC is the same as the one > present in the SAMA5D3 SOC > > Signed-off-by: Herve Codina <herve.codina@bootlin.com> > --- > arch/arm/boot/dts/lan966x.dtsi | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi > index 7d2869648050..4c09f3166d27 100644 > --- a/arch/arm/boot/dts/lan966x.dtsi > +++ b/arch/arm/boot/dts/lan966x.dtsi > @@ -211,6 +211,17 @@ can0: can@e081c000 { > status = "disabled"; > }; > > + udc: udphs@e0808000 { Shouldn't it be: udphs: udc@e0808000 { (as the node names should be generic)? [...] MBR, Sergey
diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi index 7d2869648050..4c09f3166d27 100644 --- a/arch/arm/boot/dts/lan966x.dtsi +++ b/arch/arm/boot/dts/lan966x.dtsi @@ -211,6 +211,17 @@ can0: can@e081c000 { status = "disabled"; }; + udc: udphs@e0808000 { + compatible = "microchip,lan996x-udc", + "atmel,sama5d3-udc"; + reg = <0x00200000 0x80000>, + <0xe0808000 0x400>; + interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks GCK_GATE_UDPHS>, <&nic_clk>; + clock-names = "pclk", "hclk"; + status = "disabled"; + }; + gpio: pinctrl@e2004064 { compatible = "microchip,lan966x-pinctrl"; reg = <0xe2004064 0xb4>,
Add UDPHS (the USB High Speed Device Port controller) support. The UDPHS IP present in the lan966x SOC is the same as the one present in the SAMA5D3 SOC Signed-off-by: Herve Codina <herve.codina@bootlin.com> --- arch/arm/boot/dts/lan966x.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+)