Message ID | 20220506181034.2001548-6-l.stach@pengutronix.de |
---|---|
State | Superseded |
Headers | show |
Series | i.MX8MP HDMI support | expand |
On Fri, May 06, 2022 at 08:10:30PM +0200, Lucas Stach wrote: > Add a DT binding for the HDMI PHY found on the i.MX8MP SoC. > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> > --- > .../bindings/phy/fsl,imx8mp-hdmi-phy.yaml | 62 +++++++++++++++++++ > 1 file changed, 62 insertions(+) > create mode 100644 Documentation/devicetree/bindings/phy/fsl,imx8mp-hdmi-phy.yaml > > diff --git a/Documentation/devicetree/bindings/phy/fsl,imx8mp-hdmi-phy.yaml b/Documentation/devicetree/bindings/phy/fsl,imx8mp-hdmi-phy.yaml > new file mode 100644 > index 000000000000..bc21c073e92a > --- /dev/null > +++ b/Documentation/devicetree/bindings/phy/fsl,imx8mp-hdmi-phy.yaml > @@ -0,0 +1,62 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/phy/fsl,imx8mp-hdmi-phy.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Freescale i.MX8MP HDMI PHY binding > + > +maintainers: > + - Lucas Stach <l.stach@pengutronix.de> > + > +properties: > + compatible: > + enum: > + - fsl,imx8mp-hdmi-phy > + > + reg: > + maxItems: 1 > + > + "#clock-cells": > + const: 0 > + > + clocks: > + minItems: 2 > + maxItems: 2 > + > + clock-names: > + items: > + - const: apb > + - const: ref > + > + "#phy-cells": > + const: 0 > + > + power-domains: > + maxItems: 1 > + > +required: > + - compatible > + - reg > + - "#clock-cells" > + - clocks > + - clock-names > + - power-domains #phy-cells should be required. > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/imx8mp-clock.h> > + #include <dt-bindings/power/imx8mp-power.h> > + > + phy@32fdff00 { > + compatible = "fsl,imx8mp-hdmi-phy"; > + reg = <0x32fdff00 0x100>; > + clocks = <&clk IMX8MP_CLK_HDMI_APB>, > + <&clk IMX8MP_CLK_HDMI_24M>; > + clock-names = "apb", "ref"; > + power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_HDMI_TX_PHY>; > + #clock-cells = <0>; > + #phy-cells = <0>; > + }; > -- > 2.30.2 > >
diff --git a/Documentation/devicetree/bindings/phy/fsl,imx8mp-hdmi-phy.yaml b/Documentation/devicetree/bindings/phy/fsl,imx8mp-hdmi-phy.yaml new file mode 100644 index 000000000000..bc21c073e92a --- /dev/null +++ b/Documentation/devicetree/bindings/phy/fsl,imx8mp-hdmi-phy.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/fsl,imx8mp-hdmi-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX8MP HDMI PHY binding + +maintainers: + - Lucas Stach <l.stach@pengutronix.de> + +properties: + compatible: + enum: + - fsl,imx8mp-hdmi-phy + + reg: + maxItems: 1 + + "#clock-cells": + const: 0 + + clocks: + minItems: 2 + maxItems: 2 + + clock-names: + items: + - const: apb + - const: ref + + "#phy-cells": + const: 0 + + power-domains: + maxItems: 1 + +required: + - compatible + - reg + - "#clock-cells" + - clocks + - clock-names + - power-domains + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/imx8mp-clock.h> + #include <dt-bindings/power/imx8mp-power.h> + + phy@32fdff00 { + compatible = "fsl,imx8mp-hdmi-phy"; + reg = <0x32fdff00 0x100>; + clocks = <&clk IMX8MP_CLK_HDMI_APB>, + <&clk IMX8MP_CLK_HDMI_24M>; + clock-names = "apb", "ref"; + power-domains = <&hdmi_blk_ctrl IMX8MP_HDMIBLK_PD_HDMI_TX_PHY>; + #clock-cells = <0>; + #phy-cells = <0>; + };
Add a DT binding for the HDMI PHY found on the i.MX8MP SoC. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> --- .../bindings/phy/fsl,imx8mp-hdmi-phy.yaml | 62 +++++++++++++++++++ 1 file changed, 62 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/fsl,imx8mp-hdmi-phy.yaml