| Message ID | 20220503195605.4015616-1-robimarko@gmail.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [v2,1/6] clk: qcom: clk-alpha-pll: add support for APSS PLL | expand |
On Wed, 4 May 2022 at 22:08, Rob Herring <robh@kernel.org> wrote: > > On Tue, May 03, 2022 at 09:56:01PM +0200, Robert Marko wrote: > > Add dt-binding for the IPQ8074 APSS clock controller which provides > > clocks to the CPU cores. > > > > Signed-off-by: Robert Marko <robimarko@gmail.com> > > --- > > Changes in v2: > > * Correct subject > > --- > > include/dt-bindings/clock/qcom,apss-ipq8074.h | 14 ++++++++++++++ > > 1 file changed, 14 insertions(+) > > create mode 100644 include/dt-bindings/clock/qcom,apss-ipq8074.h > > > > diff --git a/include/dt-bindings/clock/qcom,apss-ipq8074.h b/include/dt-bindings/clock/qcom,apss-ipq8074.h > > new file mode 100644 > > index 000000000000..df07766b0146 > > --- /dev/null > > +++ b/include/dt-bindings/clock/qcom,apss-ipq8074.h > > @@ -0,0 +1,14 @@ > > +/* SPDX-License-Identifier: GPL-2.0 */ > > Dual license please. Hi Rob, Krzysztof asked about this in v1, I have derived this off IPQ6018 binding which is marked GPL-2.0. So, I was not sure if it was appropriate to mark it as GPL/BSD dual license. If you say that its not an issue to dual-license, I will gladly do it. Regards, Robert > > > +/* > > + * Copyright (c) 2021, The Linux Foundation. All rights reserved. > > + */ > > + > > +#ifndef _DT_BINDINGS_CLOCK_QCA_APSS_IPQ8074_H > > +#define _DT_BINDINGS_CLOCK_QCA_APSS_IPQ8074_H > > + > > +#define APSS_PLL_EARLY 0 > > +#define APSS_PLL 1 > > +#define APCS_ALIAS0_CLK_SRC 2 > > +#define APCS_ALIAS0_CORE_CLK 3 > > + > > +#endif > > -- > > 2.35.1 > > > >
On Wed, May 04, 2022 at 10:45:22PM +0200, Robert Marko wrote: > On Wed, 4 May 2022 at 22:08, Rob Herring <robh@kernel.org> wrote: > > > > On Tue, May 03, 2022 at 09:56:01PM +0200, Robert Marko wrote: > > > Add dt-binding for the IPQ8074 APSS clock controller which provides > > > clocks to the CPU cores. > > > > > > Signed-off-by: Robert Marko <robimarko@gmail.com> > > > --- > > > Changes in v2: > > > * Correct subject > > > --- > > > include/dt-bindings/clock/qcom,apss-ipq8074.h | 14 ++++++++++++++ > > > 1 file changed, 14 insertions(+) > > > create mode 100644 include/dt-bindings/clock/qcom,apss-ipq8074.h > > > > > > diff --git a/include/dt-bindings/clock/qcom,apss-ipq8074.h b/include/dt-bindings/clock/qcom,apss-ipq8074.h > > > new file mode 100644 > > > index 000000000000..df07766b0146 > > > --- /dev/null > > > +++ b/include/dt-bindings/clock/qcom,apss-ipq8074.h > > > @@ -0,0 +1,14 @@ > > > +/* SPDX-License-Identifier: GPL-2.0 */ > > > > Dual license please. > > Hi Rob, > Krzysztof asked about this in v1, I have derived this off IPQ6018 > binding which is marked GPL-2.0. > So, I was not sure if it was appropriate to mark it as GPL/BSD dual license. > If you say that its not an issue to dual-license, I will gladly do it. Technically, you should maintain it, but I don't think 2 defines is really enough to represent copyrightable work (but IANAL). I also know that QCom prefers the DT stuff to be dual licensed because they've raised the issue with me. Rob
On Mon, 9 May 2022 at 23:12, Rob Herring <robh@kernel.org> wrote: > > On Wed, May 04, 2022 at 10:45:22PM +0200, Robert Marko wrote: > > On Wed, 4 May 2022 at 22:08, Rob Herring <robh@kernel.org> wrote: > > > > > > On Tue, May 03, 2022 at 09:56:01PM +0200, Robert Marko wrote: > > > > Add dt-binding for the IPQ8074 APSS clock controller which provides > > > > clocks to the CPU cores. > > > > > > > > Signed-off-by: Robert Marko <robimarko@gmail.com> > > > > --- > > > > Changes in v2: > > > > * Correct subject > > > > --- > > > > include/dt-bindings/clock/qcom,apss-ipq8074.h | 14 ++++++++++++++ > > > > 1 file changed, 14 insertions(+) > > > > create mode 100644 include/dt-bindings/clock/qcom,apss-ipq8074.h > > > > > > > > diff --git a/include/dt-bindings/clock/qcom,apss-ipq8074.h b/include/dt-bindings/clock/qcom,apss-ipq8074.h > > > > new file mode 100644 > > > > index 000000000000..df07766b0146 > > > > --- /dev/null > > > > +++ b/include/dt-bindings/clock/qcom,apss-ipq8074.h > > > > @@ -0,0 +1,14 @@ > > > > +/* SPDX-License-Identifier: GPL-2.0 */ > > > > > > Dual license please. > > > > Hi Rob, > > Krzysztof asked about this in v1, I have derived this off IPQ6018 > > binding which is marked GPL-2.0. > > So, I was not sure if it was appropriate to mark it as GPL/BSD dual license. > > If you say that its not an issue to dual-license, I will gladly do it. > > Technically, you should maintain it, but I don't think 2 defines is > really enough to represent copyrightable work (but IANAL). I also know > that QCom prefers the DT stuff to be dual licensed because they've > raised the issue with me. If that is the case, then I will dual-license it and send in v4 as I am waiting for the code portion to get some comments before resending. Regards, Robert > > Rob
diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c index 4406cf609aae..8270363ff98e 100644 --- a/drivers/clk/qcom/clk-alpha-pll.c +++ b/drivers/clk/qcom/clk-alpha-pll.c @@ -154,6 +154,18 @@ const u8 clk_alpha_pll_regs[][PLL_OFF_MAX_REGS] = { [PLL_OFF_TEST_CTL_U] = 0x30, [PLL_OFF_TEST_CTL_U1] = 0x34, }, + [CLK_ALPHA_PLL_TYPE_APSS] = { + [PLL_OFF_L_VAL] = 0x08, + [PLL_OFF_ALPHA_VAL] = 0x10, + [PLL_OFF_ALPHA_VAL_U] = 0xff, + [PLL_OFF_USER_CTL] = 0x18, + [PLL_OFF_USER_CTL_U] = 0xff, + [PLL_OFF_CONFIG_CTL] = 0x20, + [PLL_OFF_CONFIG_CTL_U] = 0x24, + [PLL_OFF_TEST_CTL] = 0x30, + [PLL_OFF_TEST_CTL_U] = 0x34, + [PLL_OFF_STATUS] = 0x28, + }, }; EXPORT_SYMBOL_GPL(clk_alpha_pll_regs); diff --git a/drivers/clk/qcom/clk-alpha-pll.h b/drivers/clk/qcom/clk-alpha-pll.h index 6e9907deaf30..626fdf80336d 100644 --- a/drivers/clk/qcom/clk-alpha-pll.h +++ b/drivers/clk/qcom/clk-alpha-pll.h @@ -18,6 +18,7 @@ enum { CLK_ALPHA_PLL_TYPE_AGERA, CLK_ALPHA_PLL_TYPE_ZONDA, CLK_ALPHA_PLL_TYPE_LUCID_EVO, + CLK_ALPHA_PLL_TYPE_APSS, CLK_ALPHA_PLL_TYPE_MAX, };
APSS PLL type will be used by the IPQ8074 APSS driver for providing the CPU core clocks and enabling CPU Frequency scaling. This is ported from the downstream 5.4 kernel. Signed-off-by: Robert Marko <robimarko@gmail.com> --- drivers/clk/qcom/clk-alpha-pll.c | 12 ++++++++++++ drivers/clk/qcom/clk-alpha-pll.h | 1 + 2 files changed, 13 insertions(+)