| Message ID | 20220430121902.59895-4-krzysztof.kozlowski@linaro.org |
|---|---|
| State | Accepted |
| Commit | a93fbb002310ef04fce504dbf1510f6eb8265188 |
| Headers | show |
| Series | [v2,1/9] ARM: dts: zynq-7000: drop useless 'dma-channels/requests' properties | expand |
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi index 884bda106399..aa2bba75265f 100644 --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi @@ -346,8 +346,6 @@ pdma: dma-controller@ffda0000 { <0 88 4>, <0 89 4>; #dma-cells = <1>; - #dma-channels = <8>; - #dma-requests = <32>; clocks = <&clkmgr STRATIX10_L4_MAIN_CLK>; clock-names = "apb_pclk"; resets = <&rst DMA_RESET>, <&rst DMA_OCP_RESET>; diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi index c78371703e76..caccb0334ada 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi +++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi @@ -350,8 +350,6 @@ pdma: dma-controller@ffda0000 { <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; #dma-cells = <1>; - #dma-channels = <8>; - #dma-requests = <32>; resets = <&rst DMA_RESET>, <&rst DMA_OCP_RESET>; reset-names = "dma", "dma-ocp"; clocks = <&clkmgr AGILEX_L4_MAIN_CLK>;
The pl330 DMA controller provides number of DMA channels and requests through its registers, so duplicating this information (with a chance of mistakes) in DTS is pointless. Additionally the DTS used always wrong property names which causes DT schema check failures - the bindings documented 'dma-channels' and 'dma-requests' properties without leading hash sign. Reported-by: Rob Herring <robh@kernel.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> --- arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 2 -- arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 2 -- 2 files changed, 4 deletions(-)