Message ID | 20220428181703.2194171-3-sean.anderson@seco.com |
---|---|
State | Accepted |
Commit | 8cb0cd68bef75af5ac8ef93f3314d4f8dc8767a3 |
Headers | show
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Series |
nvmem: sfp: binding updates and additions
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diff --git a/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml b/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml index b7798e903191..54086f50157d 100644 --- a/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml +++ b/Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml @@ -24,15 +24,29 @@ properties: reg: maxItems: 1 + clocks: + maxItems: 1 + description: + The SFP clock. Typically, this is the platform clock divided by 4. + + clock-names: + const: sfp + required: - compatible - reg + - clock-names + - clocks unevaluatedProperties: false examples: - | + #include <dt-bindings/clock/fsl,qoriq-clockgen.h> efuse@1e80000 { compatible = "fsl,ls1028a-sfp"; reg = <0x1e80000 0x8000>; + clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL + QORIQ_CLK_PLL_DIV(4)>; + clock-names = "sfp"; };
To program fuses, it is necessary to set the fuse programming time. This is determined based on the value of the platform clock. Add a clock property. Because this property is necessary for programming, it is made mandatory. Since these bindings have not yet been present in a stable release (though they are on track for 5.18), it is not an ABI break to change them in this manner. Signed-off-by: Sean Anderson <sean.anderson@seco.com> --- This patch causes CI to fail. It will be fixed by patch 5. Changes in v3: - Update commit message to note that this binding has not yet been present in a relase, so it is OK to make otherwise breaking changes. .../bindings/nvmem/fsl,layerscape-sfp.yaml | 14 ++++++++++++++ 1 file changed, 14 insertions(+)