diff mbox series

[6/8] i2c: i801: add i801_single_transaction(), complementing i801_block_transaction()

Message ID eba39e4d-fb5f-c9d3-0d51-001f8d584d51@gmail.com
State Superseded
Headers show
Series i2c: i801: Series with minor improvements | expand

Commit Message

Heiner Kallweit April 15, 2022, 4:58 p.m. UTC
This patch factors out non-block pre/post processing to a new function
i801_single_transaction(), complementing existing function
i801_block_transaction(). This makes i801_access() better readable.

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
---
 drivers/i2c/busses/i2c-i801.c | 95 +++++++++++++++++++++--------------
 1 file changed, 58 insertions(+), 37 deletions(-)

Comments

Jean Delvare June 10, 2022, 11:03 a.m. UTC | #1
Hi Heiner,

On Fri, 15 Apr 2022 18:58:03 +0200, Heiner Kallweit wrote:
> This patch factors out non-block pre/post processing to a new function
> i801_single_transaction(), complementing existing function
> i801_block_transaction(). This makes i801_access() better readable.

I like the idea, but I have objections about some implementation
details, see below.

> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
> ---
>  drivers/i2c/busses/i2c-i801.c | 95 +++++++++++++++++++++--------------
>  1 file changed, 58 insertions(+), 37 deletions(-)
> 
> diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c
> index bf77f8640..8c2245f38 100644
> --- a/drivers/i2c/busses/i2c-i801.c
> +++ b/drivers/i2c/busses/i2c-i801.c
> @@ -771,6 +771,62 @@ static int i801_block_transaction(struct i801_priv *priv, union i2c_smbus_data *
>  	return result;
>  }
>  
> +/* Single transaction function */

The term "single transaction" is a bit misleading. Block transactions
are also single transactions, in the sense that there's one start
condition at the beginning and one stop condition at the end. I'd
rather call non-block transactions "single value transactions" or
"simple transactions".

> +static int i801_single_transaction(struct i801_priv *priv, union i2c_smbus_data *data,
> +				   char read_write, int command)
> +{
> +	int xact, ret;
> +
> +	switch (command) {
> +	case I2C_SMBUS_QUICK:
> +		xact = I801_QUICK;
> +		break;
> +	case I2C_SMBUS_BYTE:
> +                xact = I801_BYTE;
> +                break;

Previous 2 lines are indented with spaces instead of tabs.

> +	case I2C_SMBUS_BYTE_DATA:
> +		if (read_write == I2C_SMBUS_WRITE)
> +			outb_p(data->byte, SMBHSTDAT0(priv));
> +		xact = I801_BYTE_DATA;
> +		break;
> +	case I2C_SMBUS_WORD_DATA:
> +		if (read_write == I2C_SMBUS_WRITE) {
> +			outb_p(data->word & 0xff, SMBHSTDAT0(priv));
> +			outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1(priv));
> +		}
> +		xact = I801_WORD_DATA;
> +		break;
> +	case I2C_SMBUS_PROC_CALL:
> +		outb_p(data->word & 0xff, SMBHSTDAT0(priv));
> +		outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1(priv));
> +		xact = I801_PROC_CALL;
> +		break;
> +	default:
> +		return -EOPNOTSUPP;

That's never going to happen.

Generally speaking, I'm worried about having the same switch/case
construct here that we already have in i801_access. Looks to me like we
are doing half of the work here and the other half there and I fail to
see the rationale for splitting the work like that. I mean, I see how
it solves the asymmetry between the block and non-block code paths, but
the result doesn't look appealing. From a performance perspective it's
questionable too.

What prevents us from doing all the work on either side? Maybe we
should move more code into i801_single_transaction (possibly in a
subsequent patch)?

> +	}
> +
> +	ret = i801_transaction(priv, xact);
> +

Traditionally no blank line here.

> +	if (ret || read_write == I2C_SMBUS_WRITE)
> +		return ret;
> +
> +	switch (command) {
> +	case I2C_SMBUS_BYTE:
> +	case I2C_SMBUS_BYTE_DATA:
> +		data->byte = inb_p(SMBHSTDAT0(priv));
> +		break;
> +	case I2C_SMBUS_WORD_DATA:
> +	case I2C_SMBUS_PROC_CALL:
> +		data->word = inb_p(SMBHSTDAT0(priv)) +
> +			     (inb_p(SMBHSTDAT1(priv)) << 8);
> +		break;
> +	default:
> +		break;

Default case is not needed.

> +	}
> +
> +	return 0;
> +}
> +
>  static void i801_set_hstadd(struct i801_priv *priv, u8 addr, char read_write)
>  {
>  	addr <<= 1;
> @@ -784,9 +840,7 @@ static s32 i801_access(struct i2c_adapter *adap, u16 addr,
>  		       unsigned short flags, char read_write, u8 command,
>  		       int size, union i2c_smbus_data *data)
>  {
> -	int hwpec;
> -	int block = 0;
> -	int ret, xact;
> +	int hwpec, ret, block = 0;
>  	struct i801_priv *priv = i2c_get_adapdata(adap);
>  
>  	mutex_lock(&priv->acpi_lock);
> @@ -804,36 +858,23 @@ static s32 i801_access(struct i2c_adapter *adap, u16 addr,
>  	switch (size) {
>  	case I2C_SMBUS_QUICK:
>  		i801_set_hstadd(priv, addr, read_write);
> -		xact = I801_QUICK;
>  		break;
>  	case I2C_SMBUS_BYTE:
>  		i801_set_hstadd(priv, addr, read_write);
>  		if (read_write == I2C_SMBUS_WRITE)
>  			outb_p(command, SMBHSTCMD(priv));
> -		xact = I801_BYTE;
>  		break;
>  	case I2C_SMBUS_BYTE_DATA:
>  		i801_set_hstadd(priv, addr, read_write);
>  		outb_p(command, SMBHSTCMD(priv));
> -		if (read_write == I2C_SMBUS_WRITE)
> -			outb_p(data->byte, SMBHSTDAT0(priv));
> -		xact = I801_BYTE_DATA;
>  		break;
>  	case I2C_SMBUS_WORD_DATA:
>  		i801_set_hstadd(priv, addr, read_write);
>  		outb_p(command, SMBHSTCMD(priv));
> -		if (read_write == I2C_SMBUS_WRITE) {
> -			outb_p(data->word & 0xff, SMBHSTDAT0(priv));
> -			outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1(priv));
> -		}
> -		xact = I801_WORD_DATA;
>  		break;
>  	case I2C_SMBUS_PROC_CALL:
>  		i801_set_hstadd(priv, addr, I2C_SMBUS_WRITE);
>  		outb_p(command, SMBHSTCMD(priv));
> -		outb_p(data->word & 0xff, SMBHSTDAT0(priv));
> -		outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1(priv));
> -		xact = I801_PROC_CALL;
>  		read_write = I2C_SMBUS_READ;
>  		break;
>  	case I2C_SMBUS_BLOCK_DATA:
> @@ -883,7 +924,7 @@ static s32 i801_access(struct i2c_adapter *adap, u16 addr,
>  	if (block)
>  		ret = i801_block_transaction(priv, data, read_write, size);
>  	else
> -		ret = i801_transaction(priv, xact);
> +		ret = i801_single_transaction(priv, data, read_write, size);
>  
>  	/* Some BIOSes don't like it when PEC is enabled at reboot or resume
>  	   time, so we forcibly disable it after every transaction. Turn off
> @@ -891,26 +932,6 @@ static s32 i801_access(struct i2c_adapter *adap, u16 addr,
>  	if (hwpec || block)
>  		outb_p(inb_p(SMBAUXCTL(priv)) &
>  		       ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv));
> -
> -	if (block)
> -		goto out;
> -	if (ret)
> -		goto out;
> -	if ((read_write == I2C_SMBUS_WRITE) || (xact == I801_QUICK))
> -		goto out;
> -
> -	switch (xact) {
> -	case I801_BYTE:	/* Result put in SMBHSTDAT0 */
> -	case I801_BYTE_DATA:
> -		data->byte = inb_p(SMBHSTDAT0(priv));
> -		break;
> -	case I801_WORD_DATA:
> -	case I801_PROC_CALL:
> -		data->word = inb_p(SMBHSTDAT0(priv)) +
> -			     (inb_p(SMBHSTDAT1(priv)) << 8);
> -		break;
> -	}
> -
>  out:
>  	/*
>  	 * Unlock the SMBus device for use by BIOS/ACPI,
Heiner Kallweit Dec. 17, 2022, 5:07 p.m. UTC | #2
On 10.06.2022 13:03, Jean Delvare wrote:
> Hi Heiner,
> 
> On Fri, 15 Apr 2022 18:58:03 +0200, Heiner Kallweit wrote:
>> This patch factors out non-block pre/post processing to a new function
>> i801_single_transaction(), complementing existing function
>> i801_block_transaction(). This makes i801_access() better readable.
> 
> I like the idea, but I have objections about some implementation
> details, see below.
> 
>> Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
>> ---
>>  drivers/i2c/busses/i2c-i801.c | 95 +++++++++++++++++++++--------------
>>  1 file changed, 58 insertions(+), 37 deletions(-)
>>
>> diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c
>> index bf77f8640..8c2245f38 100644
>> --- a/drivers/i2c/busses/i2c-i801.c
>> +++ b/drivers/i2c/busses/i2c-i801.c
>> @@ -771,6 +771,62 @@ static int i801_block_transaction(struct i801_priv *priv, union i2c_smbus_data *
>>  	return result;
>>  }
>>  
>> +/* Single transaction function */
> 
> The term "single transaction" is a bit misleading. Block transactions
> are also single transactions, in the sense that there's one start
> condition at the beginning and one stop condition at the end. I'd
> rather call non-block transactions "single value transactions" or
> "simple transactions".
> 
OK

>> +static int i801_single_transaction(struct i801_priv *priv, union i2c_smbus_data *data,
>> +				   char read_write, int command)
>> +{
>> +	int xact, ret;
>> +
>> +	switch (command) {
>> +	case I2C_SMBUS_QUICK:
>> +		xact = I801_QUICK;
>> +		break;
>> +	case I2C_SMBUS_BYTE:
>> +                xact = I801_BYTE;
>> +                break;
> 
> Previous 2 lines are indented with spaces instead of tabs.
> 
OK

>> +	case I2C_SMBUS_BYTE_DATA:
>> +		if (read_write == I2C_SMBUS_WRITE)
>> +			outb_p(data->byte, SMBHSTDAT0(priv));
>> +		xact = I801_BYTE_DATA;
>> +		break;
>> +	case I2C_SMBUS_WORD_DATA:
>> +		if (read_write == I2C_SMBUS_WRITE) {
>> +			outb_p(data->word & 0xff, SMBHSTDAT0(priv));
>> +			outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1(priv));
>> +		}
>> +		xact = I801_WORD_DATA;
>> +		break;
>> +	case I2C_SMBUS_PROC_CALL:
>> +		outb_p(data->word & 0xff, SMBHSTDAT0(priv));
>> +		outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1(priv));
>> +		xact = I801_PROC_CALL;
>> +		break;
>> +	default:
>> +		return -EOPNOTSUPP;
> 
> That's never going to happen.
> 
> Generally speaking, I'm worried about having the same switch/case
> construct here that we already have in i801_access. Looks to me like we
> are doing half of the work here and the other half there and I fail to
> see the rationale for splitting the work like that. I mean, I see how
> it solves the asymmetry between the block and non-block code paths, but
> the result doesn't look appealing. From a performance perspective it's
> questionable too.
> 
> What prevents us from doing all the work on either side? Maybe we
> should move more code into i801_single_transaction (possibly in a
> subsequent patch)?
> 
Makes sense. Ill add this in v2.

>> +	}
>> +
>> +	ret = i801_transaction(priv, xact);
>> +
> 
> Traditionally no blank line here.
> 
OK

>> +	if (ret || read_write == I2C_SMBUS_WRITE)
>> +		return ret;
>> +
>> +	switch (command) {
>> +	case I2C_SMBUS_BYTE:
>> +	case I2C_SMBUS_BYTE_DATA:
>> +		data->byte = inb_p(SMBHSTDAT0(priv));
>> +		break;
>> +	case I2C_SMBUS_WORD_DATA:
>> +	case I2C_SMBUS_PROC_CALL:
>> +		data->word = inb_p(SMBHSTDAT0(priv)) +
>> +			     (inb_p(SMBHSTDAT1(priv)) << 8);
>> +		break;
>> +	default:
>> +		break;
> 
> Default case is not needed.
> 
OK

>> +	}
>> +
>> +	return 0;
>> +}
>> +
>>  static void i801_set_hstadd(struct i801_priv *priv, u8 addr, char read_write)
>>  {
>>  	addr <<= 1;
>> @@ -784,9 +840,7 @@ static s32 i801_access(struct i2c_adapter *adap, u16 addr,
>>  		       unsigned short flags, char read_write, u8 command,
>>  		       int size, union i2c_smbus_data *data)
>>  {
>> -	int hwpec;
>> -	int block = 0;
>> -	int ret, xact;
>> +	int hwpec, ret, block = 0;
>>  	struct i801_priv *priv = i2c_get_adapdata(adap);
>>  
>>  	mutex_lock(&priv->acpi_lock);
>> @@ -804,36 +858,23 @@ static s32 i801_access(struct i2c_adapter *adap, u16 addr,
>>  	switch (size) {
>>  	case I2C_SMBUS_QUICK:
>>  		i801_set_hstadd(priv, addr, read_write);
>> -		xact = I801_QUICK;
>>  		break;
>>  	case I2C_SMBUS_BYTE:
>>  		i801_set_hstadd(priv, addr, read_write);
>>  		if (read_write == I2C_SMBUS_WRITE)
>>  			outb_p(command, SMBHSTCMD(priv));
>> -		xact = I801_BYTE;
>>  		break;
>>  	case I2C_SMBUS_BYTE_DATA:
>>  		i801_set_hstadd(priv, addr, read_write);
>>  		outb_p(command, SMBHSTCMD(priv));
>> -		if (read_write == I2C_SMBUS_WRITE)
>> -			outb_p(data->byte, SMBHSTDAT0(priv));
>> -		xact = I801_BYTE_DATA;
>>  		break;
>>  	case I2C_SMBUS_WORD_DATA:
>>  		i801_set_hstadd(priv, addr, read_write);
>>  		outb_p(command, SMBHSTCMD(priv));
>> -		if (read_write == I2C_SMBUS_WRITE) {
>> -			outb_p(data->word & 0xff, SMBHSTDAT0(priv));
>> -			outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1(priv));
>> -		}
>> -		xact = I801_WORD_DATA;
>>  		break;
>>  	case I2C_SMBUS_PROC_CALL:
>>  		i801_set_hstadd(priv, addr, I2C_SMBUS_WRITE);
>>  		outb_p(command, SMBHSTCMD(priv));
>> -		outb_p(data->word & 0xff, SMBHSTDAT0(priv));
>> -		outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1(priv));
>> -		xact = I801_PROC_CALL;
>>  		read_write = I2C_SMBUS_READ;
>>  		break;
>>  	case I2C_SMBUS_BLOCK_DATA:
>> @@ -883,7 +924,7 @@ static s32 i801_access(struct i2c_adapter *adap, u16 addr,
>>  	if (block)
>>  		ret = i801_block_transaction(priv, data, read_write, size);
>>  	else
>> -		ret = i801_transaction(priv, xact);
>> +		ret = i801_single_transaction(priv, data, read_write, size);
>>  
>>  	/* Some BIOSes don't like it when PEC is enabled at reboot or resume
>>  	   time, so we forcibly disable it after every transaction. Turn off
>> @@ -891,26 +932,6 @@ static s32 i801_access(struct i2c_adapter *adap, u16 addr,
>>  	if (hwpec || block)
>>  		outb_p(inb_p(SMBAUXCTL(priv)) &
>>  		       ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv));
>> -
>> -	if (block)
>> -		goto out;
>> -	if (ret)
>> -		goto out;
>> -	if ((read_write == I2C_SMBUS_WRITE) || (xact == I801_QUICK))
>> -		goto out;
>> -
>> -	switch (xact) {
>> -	case I801_BYTE:	/* Result put in SMBHSTDAT0 */
>> -	case I801_BYTE_DATA:
>> -		data->byte = inb_p(SMBHSTDAT0(priv));
>> -		break;
>> -	case I801_WORD_DATA:
>> -	case I801_PROC_CALL:
>> -		data->word = inb_p(SMBHSTDAT0(priv)) +
>> -			     (inb_p(SMBHSTDAT1(priv)) << 8);
>> -		break;
>> -	}
>> -
>>  out:
>>  	/*
>>  	 * Unlock the SMBus device for use by BIOS/ACPI,
> 
>
diff mbox series

Patch

diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c
index bf77f8640..8c2245f38 100644
--- a/drivers/i2c/busses/i2c-i801.c
+++ b/drivers/i2c/busses/i2c-i801.c
@@ -771,6 +771,62 @@  static int i801_block_transaction(struct i801_priv *priv, union i2c_smbus_data *
 	return result;
 }
 
+/* Single transaction function */
+static int i801_single_transaction(struct i801_priv *priv, union i2c_smbus_data *data,
+				   char read_write, int command)
+{
+	int xact, ret;
+
+	switch (command) {
+	case I2C_SMBUS_QUICK:
+		xact = I801_QUICK;
+		break;
+	case I2C_SMBUS_BYTE:
+                xact = I801_BYTE;
+                break;
+	case I2C_SMBUS_BYTE_DATA:
+		if (read_write == I2C_SMBUS_WRITE)
+			outb_p(data->byte, SMBHSTDAT0(priv));
+		xact = I801_BYTE_DATA;
+		break;
+	case I2C_SMBUS_WORD_DATA:
+		if (read_write == I2C_SMBUS_WRITE) {
+			outb_p(data->word & 0xff, SMBHSTDAT0(priv));
+			outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1(priv));
+		}
+		xact = I801_WORD_DATA;
+		break;
+	case I2C_SMBUS_PROC_CALL:
+		outb_p(data->word & 0xff, SMBHSTDAT0(priv));
+		outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1(priv));
+		xact = I801_PROC_CALL;
+		break;
+	default:
+		return -EOPNOTSUPP;
+	}
+
+	ret = i801_transaction(priv, xact);
+
+	if (ret || read_write == I2C_SMBUS_WRITE)
+		return ret;
+
+	switch (command) {
+	case I2C_SMBUS_BYTE:
+	case I2C_SMBUS_BYTE_DATA:
+		data->byte = inb_p(SMBHSTDAT0(priv));
+		break;
+	case I2C_SMBUS_WORD_DATA:
+	case I2C_SMBUS_PROC_CALL:
+		data->word = inb_p(SMBHSTDAT0(priv)) +
+			     (inb_p(SMBHSTDAT1(priv)) << 8);
+		break;
+	default:
+		break;
+	}
+
+	return 0;
+}
+
 static void i801_set_hstadd(struct i801_priv *priv, u8 addr, char read_write)
 {
 	addr <<= 1;
@@ -784,9 +840,7 @@  static s32 i801_access(struct i2c_adapter *adap, u16 addr,
 		       unsigned short flags, char read_write, u8 command,
 		       int size, union i2c_smbus_data *data)
 {
-	int hwpec;
-	int block = 0;
-	int ret, xact;
+	int hwpec, ret, block = 0;
 	struct i801_priv *priv = i2c_get_adapdata(adap);
 
 	mutex_lock(&priv->acpi_lock);
@@ -804,36 +858,23 @@  static s32 i801_access(struct i2c_adapter *adap, u16 addr,
 	switch (size) {
 	case I2C_SMBUS_QUICK:
 		i801_set_hstadd(priv, addr, read_write);
-		xact = I801_QUICK;
 		break;
 	case I2C_SMBUS_BYTE:
 		i801_set_hstadd(priv, addr, read_write);
 		if (read_write == I2C_SMBUS_WRITE)
 			outb_p(command, SMBHSTCMD(priv));
-		xact = I801_BYTE;
 		break;
 	case I2C_SMBUS_BYTE_DATA:
 		i801_set_hstadd(priv, addr, read_write);
 		outb_p(command, SMBHSTCMD(priv));
-		if (read_write == I2C_SMBUS_WRITE)
-			outb_p(data->byte, SMBHSTDAT0(priv));
-		xact = I801_BYTE_DATA;
 		break;
 	case I2C_SMBUS_WORD_DATA:
 		i801_set_hstadd(priv, addr, read_write);
 		outb_p(command, SMBHSTCMD(priv));
-		if (read_write == I2C_SMBUS_WRITE) {
-			outb_p(data->word & 0xff, SMBHSTDAT0(priv));
-			outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1(priv));
-		}
-		xact = I801_WORD_DATA;
 		break;
 	case I2C_SMBUS_PROC_CALL:
 		i801_set_hstadd(priv, addr, I2C_SMBUS_WRITE);
 		outb_p(command, SMBHSTCMD(priv));
-		outb_p(data->word & 0xff, SMBHSTDAT0(priv));
-		outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1(priv));
-		xact = I801_PROC_CALL;
 		read_write = I2C_SMBUS_READ;
 		break;
 	case I2C_SMBUS_BLOCK_DATA:
@@ -883,7 +924,7 @@  static s32 i801_access(struct i2c_adapter *adap, u16 addr,
 	if (block)
 		ret = i801_block_transaction(priv, data, read_write, size);
 	else
-		ret = i801_transaction(priv, xact);
+		ret = i801_single_transaction(priv, data, read_write, size);
 
 	/* Some BIOSes don't like it when PEC is enabled at reboot or resume
 	   time, so we forcibly disable it after every transaction. Turn off
@@ -891,26 +932,6 @@  static s32 i801_access(struct i2c_adapter *adap, u16 addr,
 	if (hwpec || block)
 		outb_p(inb_p(SMBAUXCTL(priv)) &
 		       ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv));
-
-	if (block)
-		goto out;
-	if (ret)
-		goto out;
-	if ((read_write == I2C_SMBUS_WRITE) || (xact == I801_QUICK))
-		goto out;
-
-	switch (xact) {
-	case I801_BYTE:	/* Result put in SMBHSTDAT0 */
-	case I801_BYTE_DATA:
-		data->byte = inb_p(SMBHSTDAT0(priv));
-		break;
-	case I801_WORD_DATA:
-	case I801_PROC_CALL:
-		data->word = inb_p(SMBHSTDAT0(priv)) +
-			     (inb_p(SMBHSTDAT1(priv)) << 8);
-		break;
-	}
-
 out:
 	/*
 	 * Unlock the SMBus device for use by BIOS/ACPI,