| Message ID | 20220415215410.498349-1-marex@denx.de |
|---|---|
| State | Accepted |
| Commit | e74200ebf7c4f6a7a7d1be9f63833ddba251effa |
| Headers | show |
| Series | irqchip/stm32: Do not call stm32_gpio_get() for edge triggered IRQs in EOI | expand |
On Fri, Apr 15, 2022 at 11:54 PM Marek Vasut <marex@denx.de> wrote: > The stm32_gpio_get() should only be called for LEVEL triggered interrupts, > skip calling it for EDGE triggered interrupts altogether to avoid wasting > CPU cycles in EOI handler. On this platform, EDGE triggered interrupts are > the majority and LEVEL triggered interrupts are the exception no less, and > the CPU cycles are not abundant. > > Fixes: 47beed513a85b ("pinctrl: stm32: Add level interrupt support to gpio irq chip") > Signed-off-by: Marek Vasut <marex@denx.de> > Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> > Cc: Fabien Dessenne <fabien.dessenne@foss.st.com> > Cc: Linus Walleij <linus.walleij@linaro.org> > Cc: Marc Zyngier <maz@kernel.org> > Cc: linux-stm32@st-md-mailman.stormreply.com > Cc: linux-arm-kernel@lists.infradead.org > To: linux-gpio@vger.kernel.org Patch applied! But I changed the subject to pinctrl: stm32: Yours, Linus Walleij
diff --git a/drivers/pinctrl/stm32/pinctrl-stm32.c b/drivers/pinctrl/stm32/pinctrl-stm32.c index 09952c463f67d..242d1c37c6e4b 100644 --- a/drivers/pinctrl/stm32/pinctrl-stm32.c +++ b/drivers/pinctrl/stm32/pinctrl-stm32.c @@ -312,6 +312,10 @@ static void stm32_gpio_irq_trigger(struct irq_data *d) struct stm32_gpio_bank *bank = d->domain->host_data; int level; + /* Do not access the GPIO if this is not LEVEL triggered IRQ. */ + if (!(bank->irq_type[d->hwirq] & IRQ_TYPE_LEVEL_MASK)) + return; + /* If level interrupt type then retrig */ level = stm32_gpio_get(&bank->gpio_chip, d->hwirq); if ((level == 0 && bank->irq_type[d->hwirq] == IRQ_TYPE_LEVEL_LOW) ||
The stm32_gpio_get() should only be called for LEVEL triggered interrupts, skip calling it for EDGE triggered interrupts altogether to avoid wasting CPU cycles in EOI handler. On this platform, EDGE triggered interrupts are the majority and LEVEL triggered interrupts are the exception no less, and the CPU cycles are not abundant. Fixes: 47beed513a85b ("pinctrl: stm32: Add level interrupt support to gpio irq chip") Signed-off-by: Marek Vasut <marex@denx.de> Cc: Alexandre Torgue <alexandre.torgue@foss.st.com> Cc: Fabien Dessenne <fabien.dessenne@foss.st.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Marc Zyngier <maz@kernel.org> Cc: linux-stm32@st-md-mailman.stormreply.com Cc: linux-arm-kernel@lists.infradead.org To: linux-gpio@vger.kernel.org --- drivers/pinctrl/stm32/pinctrl-stm32.c | 4 ++++ 1 file changed, 4 insertions(+)