diff mbox series

[1/2] dt-bindings: interconnect: Add Qualcomm SDX65 DT bindings

Message ID 1649740053-14507-2-git-send-email-quic_rohiagar@quicinc.com
State Superseded
Headers show
Series Add interconnect driver for SDX65 | expand

Commit Message

Rohit Agarwal April 12, 2022, 5:07 a.m. UTC
Add interconnect IDs for Qualcomm SDX65 platform.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
---
 .../bindings/interconnect/qcom,rpmh.yaml           |  3 +
 include/dt-bindings/interconnect/qcom,sdx65.h      | 67 ++++++++++++++++++++++
 2 files changed, 70 insertions(+)
 create mode 100644 include/dt-bindings/interconnect/qcom,sdx65.h

Comments

Rohit Agarwal April 13, 2022, 6:29 a.m. UTC | #1
On 4/12/2022 2:52 PM, Krzysztof Kozlowski wrote:
> On 12/04/2022 07:07, Rohit Agarwal wrote:
>> Add interconnect IDs for Qualcomm SDX65 platform.
>>
>> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
> (...)
>
>> diff --git a/include/dt-bindings/interconnect/qcom,sdx65.h b/include/dt-bindings/interconnect/qcom,sdx65.h
>> new file mode 100644
>> index 0000000..8d02c79
>> --- /dev/null
>> +++ b/include/dt-bindings/interconnect/qcom,sdx65.h
>> @@ -0,0 +1,67 @@
>> +/* SPDX-License-Identifier: GPL-2.0-only */
> Is it possible to license it the same as bindings (GPL-2.0 OR BSD-2-Clause)?

The qcom related code are marked as GPL 2.0 license

Thanks,
Rohit.

>
> Best regards,
> Krzysztof
Krzysztof Kozlowski April 13, 2022, 6:33 a.m. UTC | #2
On 13/04/2022 08:29, Rohit Agarwal wrote:
> On 4/12/2022 2:52 PM, Krzysztof Kozlowski wrote:
>> On 12/04/2022 07:07, Rohit Agarwal wrote:
>>> Add interconnect IDs for Qualcomm SDX65 platform.
>>>
>>> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
>> (...)
>>
>>> diff --git a/include/dt-bindings/interconnect/qcom,sdx65.h b/include/dt-bindings/interconnect/qcom,sdx65.h
>>> new file mode 100644
>>> index 0000000..8d02c79
>>> --- /dev/null
>>> +++ b/include/dt-bindings/interconnect/qcom,sdx65.h
>>> @@ -0,0 +1,67 @@
>>> +/* SPDX-License-Identifier: GPL-2.0-only */
>> Is it possible to license it the same as bindings (GPL-2.0 OR BSD-2-Clause)?
> 
> The qcom related code are marked as GPL 2.0 license

This I see here, unless you meant some other qcom related code?

Best regards,
Krzysztof
Rohit Agarwal April 13, 2022, 12:14 p.m. UTC | #3
On 4/13/2022 12:03 PM, Krzysztof Kozlowski wrote:
> On 13/04/2022 08:29, Rohit Agarwal wrote:
>> On 4/12/2022 2:52 PM, Krzysztof Kozlowski wrote:
>>> On 12/04/2022 07:07, Rohit Agarwal wrote:
>>>> Add interconnect IDs for Qualcomm SDX65 platform.
>>>>
>>>> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
>>> (...)
>>>
>>>> diff --git a/include/dt-bindings/interconnect/qcom,sdx65.h b/include/dt-bindings/interconnect/qcom,sdx65.h
>>>> new file mode 100644
>>>> index 0000000..8d02c79
>>>> --- /dev/null
>>>> +++ b/include/dt-bindings/interconnect/qcom,sdx65.h
>>>> @@ -0,0 +1,67 @@
>>>> +/* SPDX-License-Identifier: GPL-2.0-only */
>>> Is it possible to license it the same as bindings (GPL-2.0 OR BSD-2-Clause)?
>> The qcom related code are marked as GPL 2.0 license
> This I see here, unless you meant some other qcom related code?

Yes, I meant the other codes as well because most of them I see (for eg. 
sdx55) have added only GPL 2.0.

Thanks,
Rohit

>
> Best regards,
> Krzysztof
Krzysztof Kozlowski April 13, 2022, 12:21 p.m. UTC | #4
On 13/04/2022 14:14, Rohit Agarwal wrote:
> 
> On 4/13/2022 12:03 PM, Krzysztof Kozlowski wrote:
>> On 13/04/2022 08:29, Rohit Agarwal wrote:
>>> On 4/12/2022 2:52 PM, Krzysztof Kozlowski wrote:
>>>> On 12/04/2022 07:07, Rohit Agarwal wrote:
>>>>> Add interconnect IDs for Qualcomm SDX65 platform.
>>>>>
>>>>> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
>>>> (...)
>>>>
>>>>> diff --git a/include/dt-bindings/interconnect/qcom,sdx65.h b/include/dt-bindings/interconnect/qcom,sdx65.h
>>>>> new file mode 100644
>>>>> index 0000000..8d02c79
>>>>> --- /dev/null
>>>>> +++ b/include/dt-bindings/interconnect/qcom,sdx65.h
>>>>> @@ -0,0 +1,67 @@
>>>>> +/* SPDX-License-Identifier: GPL-2.0-only */
>>>> Is it possible to license it the same as bindings (GPL-2.0 OR BSD-2-Clause)?
>>> The qcom related code are marked as GPL 2.0 license
>> This I see here, unless you meant some other qcom related code?
> 
> Yes, I meant the other codes as well because most of them I see (for eg. 
> sdx55) have added only GPL 2.0.

Happens, maybe no one pointed out this. The bindings, including headers
because these are part of bindings, are expected to have (GPL-2.0 OR
BSD-2-Clause) license. Just because some bindings or some binding
headers have GPL-2.0, is not a justification that wrong license should
be used.

Best regards,
Krzysztof
Rohit Agarwal April 13, 2022, 12:24 p.m. UTC | #5
On 4/13/2022 5:51 PM, Krzysztof Kozlowski wrote:
> On 13/04/2022 14:14, Rohit Agarwal wrote:
>> On 4/13/2022 12:03 PM, Krzysztof Kozlowski wrote:
>>> On 13/04/2022 08:29, Rohit Agarwal wrote:
>>>> On 4/12/2022 2:52 PM, Krzysztof Kozlowski wrote:
>>>>> On 12/04/2022 07:07, Rohit Agarwal wrote:
>>>>>> Add interconnect IDs for Qualcomm SDX65 platform.
>>>>>>
>>>>>> Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
>>>>> (...)
>>>>>
>>>>>> diff --git a/include/dt-bindings/interconnect/qcom,sdx65.h b/include/dt-bindings/interconnect/qcom,sdx65.h
>>>>>> new file mode 100644
>>>>>> index 0000000..8d02c79
>>>>>> --- /dev/null
>>>>>> +++ b/include/dt-bindings/interconnect/qcom,sdx65.h
>>>>>> @@ -0,0 +1,67 @@
>>>>>> +/* SPDX-License-Identifier: GPL-2.0-only */
>>>>> Is it possible to license it the same as bindings (GPL-2.0 OR BSD-2-Clause)?
>>>> The qcom related code are marked as GPL 2.0 license
>>> This I see here, unless you meant some other qcom related code?
>> Yes, I meant the other codes as well because most of them I see (for eg.
>> sdx55) have added only GPL 2.0.
> Happens, maybe no one pointed out this. The bindings, including headers
> because these are part of bindings, are expected to have (GPL-2.0 OR
> BSD-2-Clause) license. Just because some bindings or some binding
> headers have GPL-2.0, is not a justification that wrong license should
> be used.

Okay, understood. Thanks for the clarification. Will update this 
immediately.

Thanks,
Rohit.

>
> Best regards,
> Krzysztof
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml b/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml
index 5a911be..9ee2a51 100644
--- a/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml
+++ b/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml
@@ -72,6 +72,9 @@  properties:
       - qcom,sdx55-mc-virt
       - qcom,sdx55-mem-noc
       - qcom,sdx55-system-noc
+      - qcom,sdx65-mc-virt
+      - qcom,sdx65-mem-noc
+      - qcom,sdx65-system-noc
       - qcom,sm8150-aggre1-noc
       - qcom,sm8150-aggre2-noc
       - qcom,sm8150-camnoc-noc
diff --git a/include/dt-bindings/interconnect/qcom,sdx65.h b/include/dt-bindings/interconnect/qcom,sdx65.h
new file mode 100644
index 0000000..8d02c79
--- /dev/null
+++ b/include/dt-bindings/interconnect/qcom,sdx65.h
@@ -0,0 +1,67 @@ 
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_SDX65_H
+#define __DT_BINDINGS_INTERCONNECT_QCOM_SDX65_H
+
+#define MASTER_LLCC	0
+#define SLAVE_EBI1	1
+
+#define MASTER_TCU_0		0
+#define MASTER_SNOC_GC_MEM_NOC	1
+#define MASTER_APPSS_PROC	2
+#define SLAVE_LLCC		3
+#define SLAVE_MEM_NOC_SNOC	4
+#define SLAVE_MEM_NOC_PCIE_SNOC	5
+
+#define MASTER_AUDIO		0
+#define MASTER_BLSP_1		1
+#define MASTER_QDSS_BAM		2
+#define MASTER_QPIC		3
+#define MASTER_SNOC_CFG		4
+#define MASTER_SPMI_FETCHER	5
+#define MASTER_ANOC_SNOC	6
+#define MASTER_IPA		7
+#define MASTER_MEM_NOC_SNOC	8
+#define MASTER_MEM_NOC_PCIE_SNOC	9
+#define MASTER_CRYPTO		10
+#define MASTER_IPA_PCIE		11
+#define MASTER_PCIE_0		12
+#define MASTER_QDSS_ETR		13
+#define MASTER_SDCC_1		14
+#define MASTER_USB3		15
+#define SLAVE_AOSS		16
+#define SLAVE_APPSS		17
+#define SLAVE_AUDIO		18
+#define SLAVE_BLSP_1		19
+#define SLAVE_CLK_CTL		20
+#define SLAVE_CRYPTO_0_CFG	21
+#define SLAVE_CNOC_DDRSS	22
+#define SLAVE_ECC_CFG		23
+#define SLAVE_IMEM_CFG		24
+#define SLAVE_IPA_CFG		25
+#define SLAVE_CNOC_MSS		26
+#define SLAVE_PCIE_PARF		27
+#define SLAVE_PDM		28
+#define SLAVE_PRNG		29
+#define SLAVE_QDSS_CFG		30
+#define SLAVE_QPIC		31
+#define SLAVE_SDCC_1		32
+#define SLAVE_SNOC_CFG		33
+#define SLAVE_SPMI_FETCHER	34
+#define SLAVE_SPMI_VGI_COEX	35
+#define SLAVE_TCSR		36
+#define SLAVE_TLMM		37
+#define SLAVE_USB3		38
+#define SLAVE_USB3_PHY_CFG	39
+#define SLAVE_ANOC_SNOC		40
+#define SLAVE_SNOC_MEM_NOC_GC	41
+#define SLAVE_IMEM		42
+#define SLAVE_SERVICE_SNOC	43
+#define SLAVE_PCIE_0		44
+#define SLAVE_QDSS_STM		45
+#define SLAVE_TCU		46
+
+#endif