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[v2,1/9] dt-bindings: clk: qcom: msm8996-apcc: Add CBF

Message ID gA4wyUQEk7ycvxLnZjHBYG8aW-XEQuaeNc-JWNFcb5DQsF-Cxc2WBwVM1IonLdFLFdwPJmAOS_G3OKghpNCvR5W5nKTigC0IAVRH19r8jnw=@protonmail.com
State New
Headers show
Series [v2,1/9] dt-bindings: clk: qcom: msm8996-apcc: Add CBF | expand

Commit Message

Yassine Oudjana April 9, 2022, 4:04 a.m. UTC 
Add CBF clock and reg.

Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com>
Acked-by: Rob Herring <robh@kernel.org>
---
 .../devicetree/bindings/clock/qcom,msm8996-apcc.yaml   | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

--
2.35.1
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Patch

diff --git a/Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml b/Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml
index a20cb10636dd..325f8aef53b2 100644
--- a/Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,msm8996-apcc.yaml
@@ -10,8 +10,8 @@  maintainers:
   - Loic Poulain <loic.poulain@linaro.org>

 description: |
-  Qualcomm CPU clock controller for MSM8996 CPUs, clock 0 is for Power cluster
-  and clock 1 is for Perf cluster.
+  Qualcomm CPU clock controller for MSM8996 CPUs, clock 0 is for Power cluster,
+  clock 1 is for Perf cluster, and clock 2 is for Coherent bus fabric (CBF).

 properties:
   compatible:
@@ -19,7 +19,9 @@  properties:
       - qcom,msm8996-apcc

   reg:
-    maxItems: 1
+    items:
+      - description: Cluster clock registers
+      - description: CBF clock registers

   '#clock-cells':
     const: 1
@@ -49,6 +51,6 @@  examples:
   - |
     kryocc: clock-controller@6400000 {
         compatible = "qcom,msm8996-apcc";
-        reg = <0x6400000 0x90000>;
+        reg = <0x6400000 0x90000>, <0x09a11000 0x10000>;
         #clock-cells = <1>;
     };