| Message ID | 20220405151517.29753-6-bp@alien8.de |
|---|---|
| State | New |
| Headers | show |
| Series | None | expand |
On Tue, 2022-04-05 at 17:15 +0200, Borislav Petkov wrote: > From: Borislav Petkov <bp@suse.de> > > Fix: > > drivers/i2c/busses/i2c-ismt.c: In function ‘ismt_hw_init’: > drivers/i2c/busses/i2c-ismt.c:770:2: error: case label does not > reduce to an integer constant > case ISMT_SPGT_SPD_400K: > ^~~~ > drivers/i2c/busses/i2c-ismt.c:773:2: error: case label does not > reduce to an integer constant > case ISMT_SPGT_SPD_1M: > ^~~~ > > See https://lore.kernel.org/r/YkwQ6%2BtIH8GQpuct@zn.tnic for the gory > details as to why it triggers with older gccs only. > > Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Seth Heasley <seth.heasley@intel.com> > Cc: Seth Heasley <seth.heasley@intel.com> > Cc: Neil Horman <nhorman@tuxdriver.com> > Cc: Wolfram Sang <wsa@kernel.org> > Cc: linux-i2c@vger.kernel.org > --- > drivers/i2c/busses/i2c-ismt.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/i2c/busses/i2c-ismt.c b/drivers/i2c/busses/i2c- > ismt.c > index f4820fd3dc13..c0364314877e 100644 > --- a/drivers/i2c/busses/i2c-ismt.c > +++ b/drivers/i2c/busses/i2c-ismt.c > @@ -145,8 +145,8 @@ > #define ISMT_SPGT_SPD_MASK 0xc0000000 /* SMBus Speed mask > */ > #define ISMT_SPGT_SPD_80K 0x00 /* 80 kHz */ > #define ISMT_SPGT_SPD_100K (0x1 << 30) /* 100 kHz */ > -#define ISMT_SPGT_SPD_400K (0x2 << 30) /* 400 kHz */ > -#define ISMT_SPGT_SPD_1M (0x3 << 30) /* 1 MHz */ > +#define ISMT_SPGT_SPD_400K (0x2U << 30) /* 400 kHz */ > +#define ISMT_SPGT_SPD_1M (0x3U << 30) /* 1 MHz */ > > > /* MSI Control Register (MSICTL) bit definitions */
diff --git a/drivers/i2c/busses/i2c-ismt.c b/drivers/i2c/busses/i2c-ismt.c index f4820fd3dc13..c0364314877e 100644 --- a/drivers/i2c/busses/i2c-ismt.c +++ b/drivers/i2c/busses/i2c-ismt.c @@ -145,8 +145,8 @@ #define ISMT_SPGT_SPD_MASK 0xc0000000 /* SMBus Speed mask */ #define ISMT_SPGT_SPD_80K 0x00 /* 80 kHz */ #define ISMT_SPGT_SPD_100K (0x1 << 30) /* 100 kHz */ -#define ISMT_SPGT_SPD_400K (0x2 << 30) /* 400 kHz */ -#define ISMT_SPGT_SPD_1M (0x3 << 30) /* 1 MHz */ +#define ISMT_SPGT_SPD_400K (0x2U << 30) /* 400 kHz */ +#define ISMT_SPGT_SPD_1M (0x3U << 30) /* 1 MHz */ /* MSI Control Register (MSICTL) bit definitions */