@@ -468,11 +468,19 @@ IRQ_TYPE_EDGE_RISING)>,
acc0: clock-controller@2088000 {
compatible = "qcom,kpss-acc-v1";
reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
+ clock-output-names = "acpu0_aux";
+ clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
+ clock-names = "pll8_vote", "pxo";
+ #clock-cells = <0>;
};
acc1: clock-controller@2098000 {
compatible = "qcom,kpss-acc-v1";
reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
+ clock-output-names = "acpu1_aux";
+ clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
+ clock-names = "pll8_vote", "pxo";
+ #clock-cells = <0>;
};
adm_dma: dma-controller@18300000 {
@@ -780,11 +788,23 @@ tcsr: syscon@1a400000 {
};
l2cc: clock-controller@2011000 {
- compatible = "qcom,kpss-gcc", "syscon";
+ compatible = "qcom,kpss-gcc-ipq8064", "qcom,kpss-gcc", "syscon";
reg = <0x2011000 0x1000>;
- clocks = <&gcc PLL8_VOTE>, <&gcc PXO_SRC>;
+ clocks = <&gcc PLL8_VOTE>, <&pxo_board>;
clock-names = "pll8_vote", "pxo";
clock-output-names = "acpu_l2_aux";
+ #clock-cells = <0>;
+ };
+
+ kraitcc: clock-controller {
+ compatible = "qcom,krait-cc-v1";
+ clocks = <&gcc PLL9>, <&gcc PLL10>,
+ <&acc0>, <&acc1>, <&qsb>,
+ <&gcc PLL12>, <&l2cc>;
+ clock-names = "hfpll0", "hfpll1",
+ "acpu0_aux", "acpu1_aux", "qsb",
+ "hfpll_l2", "acpu_l2_aux";
+ #clock-cells = <1>;
};
lcc: clock-controller@28000000 {
Add missing krait-cc clock-controller and define missing aux clock for CPUs. Also change phandle for l2cc node to point to pxo_board instead of gcc PXO_SRC. This should align ipq8064 dtsi to the new changes in the Documentation. Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> --- arch/arm/boot/dts/qcom-ipq8064.dtsi | 24 ++++++++++++++++++++++-- 1 file changed, 22 insertions(+), 2 deletions(-)