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[v2,10/12] dt-bindings: spi: sunxi: document F1C100 controllers

Message ID 20220317162349.739636-11-andre.przywara@arm.com
State Accepted
Commit 382e0d4f9ece6d1b282ac70c246bdc7be5edc053
Headers show
Series ARM: suniv: dts: update Allwinner F1C100 | expand

Commit Message

Andre Przywara March 17, 2022, 4:23 p.m. UTC 
The Allwinner F1C100 series contains two SPI controllers, which are
compatible to the IP block used in the Allwinner H3 as well.
The only difference in the integration is the missing mod clock in the
F1C100, but that does not affect the SPI controller binding, as we can
still supply the correct clock (AHB parent) easily.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Samuel Holland <samuel@sholland.org>
Acked-by: Rob Herring <robh@kernel.org>
---
 .../devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml         | 1 +
 1 file changed, 1 insertion(+)
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Patch

diff --git a/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml b/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml
index 908248260afa..ca4c95345a49 100644
--- a/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml
+++ b/Documentation/devicetree/bindings/spi/allwinner,sun6i-a31-spi.yaml
@@ -26,6 +26,7 @@  properties:
               - allwinner,sun8i-r40-spi
               - allwinner,sun50i-h6-spi
               - allwinner,sun50i-h616-spi
+              - allwinner,suniv-f1c100s-spi
           - const: allwinner,sun8i-h3-spi
 
   reg: