diff mbox series

ARM: dts: bcm-cygnus: Update spi clock properties

Message ID 20220311084114.16408-1-singh.kuldeep87k@gmail.com
State Accepted
Commit a14a56a3dd6bb45aa7c0ef1a665839656f2bcce3
Headers show
Series ARM: dts: bcm-cygnus: Update spi clock properties | expand

Commit Message

Kuldeep Singh March 11, 2022, 8:41 a.m. UTC
PL022 binding require two clocks to be defined but broadcom cygnus
platform doesn't comply with bindings and define only one clock.

Update spi clocks and clocks-names property by adding appropriate clock
reference to make it compliant with bindings.

CC: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Kuldeep Singh <singh.kuldeep87k@gmail.com>
---
 arch/arm/boot/dts/bcm-cygnus.dtsi | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

Comments

Florian Fainelli April 4, 2022, 6:33 p.m. UTC | #1
On Fri, 11 Mar 2022 14:11:14 +0530, Kuldeep Singh <singh.kuldeep87k@gmail.com> wrote:
> PL022 binding require two clocks to be defined but broadcom cygnus
> platform doesn't comply with bindings and define only one clock.
> 
> Update spi clocks and clocks-names property by adding appropriate clock
> reference to make it compliant with bindings.
> 
> CC: Florian Fainelli <f.fainelli@gmail.com>
> Signed-off-by: Kuldeep Singh <singh.kuldeep87k@gmail.com>
> ---

Applied to https://github.com/Broadcom/stblinux/commits/devicetree/next, thanks!
--
Florian
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
index ad65be871938..f9f79ed82518 100644
--- a/arch/arm/boot/dts/bcm-cygnus.dtsi
+++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
@@ -397,8 +397,8 @@  spi0: spi@18028000 {
 			#size-cells = <0>;
 			interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
 			pinctrl-0 = <&spi_0>;
-			clocks = <&axi81_clk>;
-			clock-names = "apb_pclk";
+			clocks = <&axi81_clk>, <&axi81_clk>;
+			clock-names = "sspclk", "apb_pclk";
 			status = "disabled";
 		};
 
@@ -409,8 +409,8 @@  spi1: spi@18029000 {
 			#size-cells = <0>;
 			interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
 			pinctrl-0 = <&spi_1>;
-			clocks = <&axi81_clk>;
-			clock-names = "apb_pclk";
+			clocks = <&axi81_clk>, <&axi81_clk>;
+			clock-names = "sspclk", "apb_pclk";
 			status = "disabled";
 		};
 
@@ -421,8 +421,8 @@  spi2: spi@1802a000 {
 			#size-cells = <0>;
 			interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
 			pinctrl-0 = <&spi_2>;
-			clocks = <&axi81_clk>;
-			clock-names = "apb_pclk";
+			clocks = <&axi81_clk>, <&axi81_clk>;
+			clock-names = "sspclk", "apb_pclk";
 			status = "disabled";
 		};