| Message ID | 20220307122151.11666-3-jia-wei.chang@mediatek.com |
|---|---|
| State | New |
| Headers | show |
| Series | cpufreq: mediatek: introduce mtk cpufreq | expand |
On Mon, Mar 07, 2022 at 08:21:49PM +0800, Tim Chang wrote: > 1. add cci property. > 2. add example of MT8186. > > Signed-off-by: Jia-Wei Chang <jia-wei.chang@mediatek.corp-partner.google.com> > --- > .../bindings/cpufreq/cpufreq-mediatek.yaml | 41 +++++++++++++++++++ > 1 file changed, 41 insertions(+) > > diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.yaml b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.yaml > index 584946eb3790..d3ce17fd8fcf 100644 > --- a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.yaml > +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.yaml > @@ -48,6 +48,10 @@ properties: > When absent, the voltage scaling flow is handled by hardware, hence no > software "voltage tracking" is needed. > > + cci: > + description: > + Phandle of the cci to be linked with the phandle of CPU if present. We already have a binding for this. See cci-control-port. > + > "#cooling-cells": > description: > For details, please refer to
On Thu, 2022-03-10 at 14:44 -0600, Rob Herring wrote: > On Mon, Mar 07, 2022 at 08:21:49PM +0800, Tim Chang wrote: > > 1. add cci property. > > 2. add example of MT8186. > > > > Signed-off-by: Jia-Wei Chang < > > jia-wei.chang@mediatek.corp-partner.google.com> > > --- > > .../bindings/cpufreq/cpufreq-mediatek.yaml | 41 > > +++++++++++++++++++ > > 1 file changed, 41 insertions(+) > > > > diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq- > > mediatek.yaml b/Documentation/devicetree/bindings/cpufreq/cpufreq- > > mediatek.yaml > > index 584946eb3790..d3ce17fd8fcf 100644 > > --- a/Documentation/devicetree/bindings/cpufreq/cpufreq- > > mediatek.yaml > > +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq- > > mediatek.yaml > > @@ -48,6 +48,10 @@ properties: > > When absent, the voltage scaling flow is handled by > > hardware, hence no > > software "voltage tracking" is needed. > > > > + cci: > > + description: > > + Phandle of the cci to be linked with the phandle of CPU if > > present. > > We already have a binding for this. See cci-control-port. Hi Rob, Pardon me for my late reply. It seems that "cci-control-port" is hardware IP from ARM. But mediatek-cpufreq uses MTK internal CCI hardware IP. I think I should keep this change here. Thanks. > > > + > > "#cooling-cells": > > description: > > For details, please refer to
diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.yaml b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.yaml index 584946eb3790..d3ce17fd8fcf 100644 --- a/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.yaml +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-mediatek.yaml @@ -48,6 +48,10 @@ properties: When absent, the voltage scaling flow is handled by hardware, hence no software "voltage tracking" is needed. + cci: + description: + Phandle of the cci to be linked with the phandle of CPU if present. + "#cooling-cells": description: For details, please refer to @@ -129,3 +133,40 @@ examples: /* ... */ }; + + - | + /* Example 3 (MT8186 SoC) */ + #include <dt-bindings/clock/mt8186-clk.h> + cluster0_opp: opp-table-0 { + compatible = "operating-points-v2"; + opp-shared; + opp0_00: opp-500000000 { + opp-hz = /bits/ 64 <500000000>; + opp-microvolt = <600000>; + opp-level = <15>; + required-opps = <&opp2_00>; + }; + + /* ... */ + + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x0100>; + enable-method = "psci"; + clocks = <&mcusys CLK_MCU_ARMPLL_LL_SEL>, <&apmixedsys CLK_APMIXED_MAINPLL>; + clock-names = "cpu", "intermediate"; + operating-points-v2 = <&cluster0_opp>; + proc-supply = <&mt6358_vproc12_reg>; + sram-supply = <&mt6358_vsram_proc12_reg>; + cci = <&cci>; + }; + + /* ... */ + + };
1. add cci property. 2. add example of MT8186. Signed-off-by: Jia-Wei Chang <jia-wei.chang@mediatek.corp-partner.google.com> --- .../bindings/cpufreq/cpufreq-mediatek.yaml | 41 +++++++++++++++++++ 1 file changed, 41 insertions(+)