| Message ID | 20220308072005.307955-20-richard.henderson@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | target/nios2: Shadow register set, EIC and VIC | expand |
On Tue, 8 Mar 2022 at 07:20, Richard Henderson <richard.henderson@linaro.org> wrote: > > Without EIC, this bit is RES1. So set the bit at reset, > and add it to the readonly fields of CR_STATUS. > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > --- > target/nios2/cpu.h | 1 + > target/nios2/cpu.c | 5 +++-- > 2 files changed, 4 insertions(+), 2 deletions(-) Reviewed-by: Peter Maydell <peter.maydell@linaro.org> thanks -- PMM
diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index 7faec97d77..b418deec4c 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -108,6 +108,7 @@ FIELD(CR_STATUS, IL, 4, 6) FIELD(CR_STATUS, CRS, 10, 6) FIELD(CR_STATUS, PRS, 16, 6) FIELD(CR_STATUS, NMI, 22, 1) +FIELD(CR_STATUS, RSIE, 23, 1) #define CR_STATUS_PIE (1u << R_CR_STATUS_PIE_SHIFT) #define CR_STATUS_U (1u << R_CR_STATUS_U_SHIFT) diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c index fbcb4da737..ed7b9f9459 100644 --- a/target/nios2/cpu.c +++ b/target/nios2/cpu.c @@ -59,9 +59,9 @@ static void nios2_cpu_reset(DeviceState *dev) #if defined(CONFIG_USER_ONLY) /* Start in user mode with interrupts enabled. */ - env->status = CR_STATUS_U | CR_STATUS_PIE; + env->status = CR_STATUS_RSIE | CR_STATUS_U | CR_STATUS_PIE; #else - env->status = 0; + env->status = CR_STATUS_RSIE; #endif } @@ -109,6 +109,7 @@ static void nios2_cpu_initfn(Object *obj) WR_REG(CR_BADADDR); /* TODO: These control registers are not present with the EIC. */ + RO_FIELD(CR_STATUS, RSIE); WR_REG(CR_IENABLE); RO_REG(CR_IPENDING);
Without EIC, this bit is RES1. So set the bit at reset, and add it to the readonly fields of CR_STATUS. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/nios2/cpu.h | 1 + target/nios2/cpu.c | 5 +++-- 2 files changed, 4 insertions(+), 2 deletions(-)