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-Samsung Exynos SoC USB controller
-
-The USB devices interface with USB controllers on Exynos SOCs.
-The device node has following properties.
-
-EHCI
-Required properties:
- - compatible: should be "samsung,exynos4210-ehci" for USB 2.0
- EHCI controller in host mode.
- - reg: physical base address of the controller and length of memory mapped
- region.
- - interrupts: interrupt number to the cpu.
- - clocks: from common clock binding: handle to usb clock.
- - clock-names: from common clock binding: Shall be "usbhost".
- - phys: from the *Generic PHY* bindings; array specifying phy(s) used
- by the root port.
- - phy-names: from the *Generic PHY* bindings; array of the names for
- each phy for the root ports, must be a subset of the following:
- "host", "hsic0", "hsic1".
-
-Optional properties:
- - samsung,vbus-gpio: if present, specifies the GPIO that
- needs to be pulled up for the bus to be powered.
-
-Example:
-
- usb@12110000 {
- compatible = "samsung,exynos4210-ehci";
- reg = <0x12110000 0x100>;
- interrupts = <0 71 0>;
- samsung,vbus-gpio = <&gpx2 6 1 3 3>;
-
- clocks = <&clock 285>;
- clock-names = "usbhost";
-
- phys = <&usb2phy 1>;
- phy-names = "host";
- };
-
-OHCI
-Required properties:
- - compatible: should be "samsung,exynos4210-ohci" for USB 2.0
- OHCI companion controller in host mode.
- - reg: physical base address of the controller and length of memory mapped
- region.
- - interrupts: interrupt number to the cpu.
- - clocks: from common clock binding: handle to usb clock.
- - clock-names: from common clock binding: Shall be "usbhost".
- - phys: from the *Generic PHY* bindings; array specifying phy(s) used
- by the root port.
- - phy-names: from the *Generic PHY* bindings; array of the names for
- each phy for the root ports, must be a subset of the following:
- "host", "hsic0", "hsic1".
-
-Example:
- usb@12120000 {
- compatible = "samsung,exynos4210-ohci";
- reg = <0x12120000 0x100>;
- interrupts = <0 71 0>;
-
- clocks = <&clock 285>;
- clock-names = "usbhost";
-
- phys = <&usb2phy 1>;
- phy-names = "host";
- };
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+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/samsung,exynos-usb2.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Samsung Exynos SoC USB 2.0 EHCI/OHCI Controller
+
+maintainers:
+ - Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
+
+properties:
+ compatible:
+ enum:
+ - samsung,exynos4210-ehci
+ - samsung,exynos4210-ohci
+
+ '#address-cells':
+ const: 1
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ items:
+ - const: usbhost
+
+ interrupts:
+ maxItems: 1
+
+ phys:
+ minItems: 1
+ maxItems: 3
+
+ phy-names:
+ items:
+ enum: [host, hsic0, hsic1]
+ minItems: 1
+ maxItems: 3
+
+ reg:
+ maxItems: 1
+
+ samsung,vbus-gpio:
+ description:
+ Only for controller in EHCI mode, if present, specifies the GPIO that
+ needs to be pulled up for the bus to be powered.
+
+ '#size-cells':
+ const: 0
+
+patternProperties:
+ "^.*@[0-9a-f]{1,2}$":
+ description: The hard wired USB devices
+ type: object
+ $ref: /usb/usb-device.yaml
+
+required:
+ - compatible
+ - clocks
+ - clock-names
+ - interrupts
+ - phys
+ - phy-names
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: samsung,exynos4210-ohci
+ then:
+ properties:
+ samsung,vbus-gpio: false
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/exynos5420.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ usb@12110000 {
+ compatible = "samsung,exynos4210-ehci";
+ reg = <0x12110000 0x100>;
+ interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock CLK_USBH20>;
+ clock-names = "usbhost";
+ phys = <&usb2_phy 0>;
+ phy-names = "host";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ hub@1 {
+ compatible = "usb0424,9514";
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ usbether@1 {
+ compatible = "usb0424,ec00";
+ reg = <1>;
+ local-mac-address = [00 00 00 00 00 00];
+ };
+ };
+ };
+
+ usb@12120000 {
+ compatible = "samsung,exynos4210-ohci";
+ reg = <0x12120000 0x100>;
+ interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clock CLK_USBH20>;
+ clock-names = "usbhost";
+ phys = <&usb2_phy 0>;
+ phy-names = "host";
+ };