new file mode 100644
@@ -0,0 +1,114 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/pci0014,7a06.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Loongson LS7A2000/LS7A1000/LS2K1000/LS2K0500 Display Controller Device Tree Bindings
+
+maintainers:
+ - Sui Jingfeng <suijingfeng@loongson.cn>
+
+description: |+
+
+ Loongson display controllers are simple which require scanout buffers
+ to be physically contiguous. LS2K1000/LS2K0500 is a SOC, only system
+ memory is available. LS7A1000/LS7A2000 is bridge chip which is equipped
+ with a dedicated video ram which is 64MB or more.
+
+ For LS7A1000, there are 4 dedicated GPIOs whose control register is
+ located at the DC register space. They are used to emulate two way i2c,
+ One for DVO0, another for DVO1.
+
+ LS2K1000 and LS2K0500 SoC grab i2c adapter from other module, either
+ general purpose GPIO emulated i2c or hardware i2c in the SoC.
+
+ LSDC has two display pipes, each way has a DVO interface which provide
+ RGB888 signals, vertical & horizontal synchronisations, data enable and
+ the pixel clock. LSDC has two CRTC, each CRTC is able to scanout from
+ 1920x1080 resolution at 60Hz. Each CRTC has two FB address registers.
+
+ LSDC's display pipeline have several components as below description,
+
+ The display controller in LS7A1000:
+ ___________________ _________
+ | -------| | |
+ | CRTC0 --> | DVO0 ----> Encoder0 ---> Connector0 ---> | Monotor |
+ | _ _ -------| ^ ^ |_________|
+ | | | | | -------| | |
+ | |_| |_| | i2c0 <--------+-------------+
+ | -------|
+ | DC IN LS7A1000 |
+ | _ _ -------|
+ | | | | | | i2c1 <--------+-------------+
+ | |_| |_| -------| | | _________
+ | -------| | | | |
+ | CRTC1 --> | DVO1 ----> Encoder1 ---> Connector1 ---> | Panel |
+ | -------| |_________|
+ |___________________|
+
+ Simple usage of LS7A1000 with LS3A4000 CPU:
+
+ +------+ +-----------------------------------+
+ | DDR4 | | +-------------------+ |
+ +------+ | | PCIe Root complex | LS7A1000 |
+ || MC0 | +--++---------++----+ |
+ +----------+ HT 3.0 | || || |
+ | LS3A4000 |<-------->| +---++---+ +--++--+ +---------+ +------+
+ | CPU |<-------->| | GC1000 | | LSDC |<-->| DDR3 MC |<->| VRAM |
+ +----------+ | +--------+ +-+--+-+ +---------+ +------+
+ || MC1 +---------------|--|----------------+
+ +------+ | |
+ | DDR4 | +-------+ DVO0 | | DVO1 +------+
+ +------+ VGA <--|ADV7125|<--------+ +-------->|TFP410|--> DVI/HDMI
+ +-------+ +------+
+
+ The display controller in LS2K1000/LS2K0500:
+ ___________________ _________
+ | -------| | |
+ | CRTC0 --> | DVO0 ----> Encoder0 ---> Connector0 ---> | Monotor |
+ | _ _ -------| ^ ^ |_________|
+ | | | | | | | |
+ | |_| |_| | +------+ |
+ | <---->| i2c0 |<---------+
+ | DC IN LS2K1000 | +------+
+ | _ _ | +------+
+ | | | | | <---->| i2c1 |----------+
+ | |_| |_| | +------+ | _________
+ | -------| | | | |
+ | CRTC1 --> | DVO1 ----> Encoder1 ---> Connector1 ---> | Panel |
+ | -------| |_________|
+ |___________________|
+
+properties:
+ compatible:
+ enum:
+ - loongson,ls7a2000-dc
+ - loongson,ls7a1000-dc
+ - loongson,ls2k1000-dc
+ - loongson,ls2k0500-dc
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ minItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+
+additionalProperties: false
+
+examples:
+ - |
+ lsdc: dc@6,1 {
+ compatible = "loongson,ls7a1000-dc";
+ reg = <0x3100 0x0 0x0 0x0 0x0>;
+ interrupts = <28 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-parent = <&pic>;
+ };
+
+...
+
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@@ -0,0 +1,16 @@
+Loongson display controller
+===========================
+
+Required properties:
+- compatible: Should be "loongson,display-subsystem" or "loongson,ls-fb"
+- reg: should be register base and length
+- interrupts: Should contain the cores interrupt line
+
+example:
+
+lsdc: dc@0x400c0000 {
+ compatible = "loongson,display-subsystem", "loongson,ls-fb";
+ reg = <0x400c0000 0x00010000>;
+ interrupt-parent = <&icu>;
+ interrupts = <36>;
+};
@@ -209,6 +209,14 @@ gpu@5,0 {
interrupt-parent = <&liointc0>;
};
+ lsdc: dc@6,0 {
+ compatible = "loongson,ls2k1000-dc";
+
+ reg = <0x3000 0x0 0x0 0x0 0x0>;
+ interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-parent = <&liointc0>;
+ };
+
pci_bridge@9,0 {
compatible = "pci0014,7a19.0",
"pci0014,7a19",
@@ -160,11 +160,8 @@ gpu@6,0 {
interrupt-parent = <&pic>;
};
- dc@6,1 {
- compatible = "pci0014,7a06.0",
- "pci0014,7a06",
- "pciclass030000",
- "pciclass0300";
+ lsdc: dc@6,1 {
+ compatible = "loongson,ls7a1000-dc";
reg = <0x3100 0x0 0x0 0x0 0x0>;
interrupts = <28 IRQ_TYPE_LEVEL_HIGH>;