Message ID | 20220214212955.1178947-1-piotr.oniszczuk@gmail.com |
---|---|
State | Accepted |
Commit | 5f6bfab6da6531238e899fdf29efd6d0185adc3e |
Headers | show |
Series | [v2,1/3] media: hantro: Add support for Hantro G1 on RK356x | expand |
On Mon, Feb 14, 2022 at 10:29:53PM +0100, Piotr Oniszczuk wrote: > From: Piotr Oniszczuk <piotr.oniszczuk@gmail.com> > > RK356x has Hantro G1 video decoder capable to decode MPEG2/H.264/VP8 > video formats. > > This patch adds support for RK356x family in existing Hantro > video decoder kernel driver. > > Tested on [1] with FFmpeg v4l2_request code taken from [2] > with MPEG2, H.642 and VP8 samples with results [3]. > > [1] https://github.com/warpme/minimyth2 > [2] https://github.com/LibreELEC/LibreELEC.tv/blob/master/packages/multimedia/ffmpeg/patches/v4l2-request/ffmpeg-001-v4l2-request.patch > [3] https://github.com/warpme/minimyth2/blob/master/video-test-summary.txt > > Signed-off-by: Piotr Oniszczuk <piotr.oniszczuk@gmail.com> Reviewed-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Thanks, Ezequiel > --- > drivers/staging/media/hantro/hantro_drv.c | 1 + > drivers/staging/media/hantro/hantro_hw.h | 1 + > drivers/staging/media/hantro/rockchip_vpu_hw.c | 14 ++++++++++++++ > 3 files changed, 16 insertions(+) > > diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c > index 6a51f39dde56..ac7d58069eb8 100644 > --- a/drivers/staging/media/hantro/hantro_drv.c > +++ b/drivers/staging/media/hantro/hantro_drv.c > @@ -613,6 +613,7 @@ static const struct of_device_id of_hantro_match[] = { > { .compatible = "rockchip,rk3288-vpu", .data = &rk3288_vpu_variant, }, > { .compatible = "rockchip,rk3328-vpu", .data = &rk3328_vpu_variant, }, > { .compatible = "rockchip,rk3399-vpu", .data = &rk3399_vpu_variant, }, > + { .compatible = "rockchip,rk3568-vpu", .data = &rk3568_vpu_variant, }, > #endif > #ifdef CONFIG_VIDEO_HANTRO_IMX8M > { .compatible = "nxp,imx8mq-vpu", .data = &imx8mq_vpu_variant, }, > diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h > index 4a19ae8940b9..89ec6d500938 100644 > --- a/drivers/staging/media/hantro/hantro_hw.h > +++ b/drivers/staging/media/hantro/hantro_hw.h > @@ -307,6 +307,7 @@ extern const struct hantro_variant rk3066_vpu_variant; > extern const struct hantro_variant rk3288_vpu_variant; > extern const struct hantro_variant rk3328_vpu_variant; > extern const struct hantro_variant rk3399_vpu_variant; > +extern const struct hantro_variant rk3568_vpu_variant; > extern const struct hantro_variant sama5d4_vdec_variant; > extern const struct hantro_variant sunxi_vpu_variant; > > diff --git a/drivers/staging/media/hantro/rockchip_vpu_hw.c b/drivers/staging/media/hantro/rockchip_vpu_hw.c > index c203b606e6e7..5e64cf068ff9 100644 > --- a/drivers/staging/media/hantro/rockchip_vpu_hw.c > +++ b/drivers/staging/media/hantro/rockchip_vpu_hw.c > @@ -551,6 +551,20 @@ const struct hantro_variant rk3399_vpu_variant = { > .num_clocks = ARRAY_SIZE(rockchip_vpu_clk_names) > }; > > +const struct hantro_variant rk3568_vpu_variant = { > + .dec_offset = 0x400, > + .dec_fmts = rk3399_vpu_dec_fmts, > + .num_dec_fmts = ARRAY_SIZE(rk3399_vpu_dec_fmts), > + .codec = HANTRO_MPEG2_DECODER | > + HANTRO_VP8_DECODER | HANTRO_H264_DECODER, > + .codec_ops = rk3399_vpu_codec_ops, > + .irqs = rockchip_vdpu2_irqs, > + .num_irqs = ARRAY_SIZE(rockchip_vdpu2_irqs), > + .init = rockchip_vpu_hw_init, > + .clk_names = rockchip_vpu_clk_names, > + .num_clocks = ARRAY_SIZE(rockchip_vpu_clk_names) > +}; > + > const struct hantro_variant px30_vpu_variant = { > .enc_offset = 0x0, > .enc_fmts = rockchip_vpu_enc_fmts, > -- > 2.29.2 >
On Mon, Feb 14, 2022 at 10:29:54PM +0100, Piotr Oniszczuk wrote: > From: Piotr Oniszczuk <piotr.oniszczuk@gmail.com> > > RK356x has Hantro G1 video decoder capable to decode MPEG2/H.264/VP8 > video formats. > > This patch enables RK356x video decoder in RK356x device-tree > include. > > Tested on [1] with FFmpeg v4l2_request code taken from [2] > with MPEG2, H.642 and VP8 samples with results [3]. > > [1] https://github.com/warpme/minimyth2 > [2] https://github.com/LibreELEC/LibreELEC.tv/blob/master/packages/multimedia/ffmpeg/patches/v4l2-request/ffmpeg-001-v4l2-request.patch > [3] https://github.com/warpme/minimyth2/blob/master/video-test-summary.txt > > Signed-off-by: Piotr Oniszczuk <piotr.oniszczuk@gmail.com> Reviewed-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> Thanks, Ezequiel > --- > arch/arm64/boot/dts/rockchip/rk356x.dtsi | 20 ++++++++++++++++++++ > 1 file changed, 20 insertions(+) > > diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi > index a68033a23975..33ecaafa8cb7 100644 > --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi > +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi > @@ -390,6 +390,26 @@ power-domain@RK3568_PD_RKVENC { > }; > }; > > + vpu: video-codec@fdea0400 { > + compatible = "rockchip,rk3568-vpu"; > + reg = <0x0 0xfdea0000 0x0 0x800>; > + interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; > + clock-names = "aclk", "hclk"; > + iommus = <&vdpu_mmu>; > + power-domains = <&power RK3568_PD_VPU>; > + }; > + > + vdpu_mmu: iommu@fdea0800 { > + compatible = "rockchip,rk3568-iommu"; > + reg = <0x0 0xfdea0800 0x0 0x40>; > + interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; > + clock-names = "aclk", "iface"; > + clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; > + power-domains = <&power RK3568_PD_VPU>; > + #iommu-cells = <0>; > + }; > + > sdmmc2: mmc@fe000000 { > compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc"; > reg = <0x0 0xfe000000 0x0 0x4000>; > -- > 2.29.2 >
Hi Heiko, On Sun, Mar 20, 2022 at 9:37 AM Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> wrote: > > On Mon, Feb 14, 2022 at 10:29:54PM +0100, Piotr Oniszczuk wrote: > > From: Piotr Oniszczuk <piotr.oniszczuk@gmail.com> > > > > RK356x has Hantro G1 video decoder capable to decode MPEG2/H.264/VP8 > > video formats. > > > > This patch enables RK356x video decoder in RK356x device-tree > > include. > > > > Tested on [1] with FFmpeg v4l2_request code taken from [2] > > with MPEG2, H.642 and VP8 samples with results [3]. > > > > [1] https://github.com/warpme/minimyth2 > > [2] https://github.com/LibreELEC/LibreELEC.tv/blob/master/packages/multimedia/ffmpeg/patches/v4l2-request/ffmpeg-001-v4l2-request.patch > > [3] https://github.com/warpme/minimyth2/blob/master/video-test-summary.txt > > > > Signed-off-by: Piotr Oniszczuk <piotr.oniszczuk@gmail.com> > > Reviewed-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar> > Looks like this slipped thru the cracks. Any chance it gets queued? Thanks, Ezequiel > Thanks, > Ezequiel > > > --- > > arch/arm64/boot/dts/rockchip/rk356x.dtsi | 20 ++++++++++++++++++++ > > 1 file changed, 20 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/rockchip/rk356x.dtsi b/arch/arm64/boot/dts/rockchip/rk356x.dtsi > > index a68033a23975..33ecaafa8cb7 100644 > > --- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi > > +++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi > > @@ -390,6 +390,26 @@ power-domain@RK3568_PD_RKVENC { > > }; > > }; > > > > + vpu: video-codec@fdea0400 { > > + compatible = "rockchip,rk3568-vpu"; > > + reg = <0x0 0xfdea0000 0x0 0x800>; > > + interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; > > + clock-names = "aclk", "hclk"; > > + iommus = <&vdpu_mmu>; > > + power-domains = <&power RK3568_PD_VPU>; > > + }; > > + > > + vdpu_mmu: iommu@fdea0800 { > > + compatible = "rockchip,rk3568-iommu"; > > + reg = <0x0 0xfdea0800 0x0 0x40>; > > + interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; > > + clock-names = "aclk", "iface"; > > + clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; > > + power-domains = <&power RK3568_PD_VPU>; > > + #iommu-cells = <0>; > > + }; > > + > > sdmmc2: mmc@fe000000 { > > compatible = "rockchip,rk3568-dw-mshc", "rockchip,rk3288-dw-mshc"; > > reg = <0x0 0xfe000000 0x0 0x4000>; > > -- > > 2.29.2 > >
On Mon, 14 Feb 2022 22:29:53 +0100, Piotr Oniszczuk wrote: > RK356x has Hantro G1 video decoder capable to decode MPEG2/H.264/VP8 > video formats. > > This patch adds support for RK356x family in existing Hantro > video decoder kernel driver. > > Tested on [1] with FFmpeg v4l2_request code taken from [2] > with MPEG2, H.642 and VP8 samples with results [3]. > > [...] Applied, thanks! [2/3] arm64: dts: rockchip: Add VPU support for RK3568/RK3566 commit: 944be6fba401639e5bf2a8bc9f5e781e6cc4b4d4 Best regards,
diff --git a/drivers/staging/media/hantro/hantro_drv.c b/drivers/staging/media/hantro/hantro_drv.c index 6a51f39dde56..ac7d58069eb8 100644 --- a/drivers/staging/media/hantro/hantro_drv.c +++ b/drivers/staging/media/hantro/hantro_drv.c @@ -613,6 +613,7 @@ static const struct of_device_id of_hantro_match[] = { { .compatible = "rockchip,rk3288-vpu", .data = &rk3288_vpu_variant, }, { .compatible = "rockchip,rk3328-vpu", .data = &rk3328_vpu_variant, }, { .compatible = "rockchip,rk3399-vpu", .data = &rk3399_vpu_variant, }, + { .compatible = "rockchip,rk3568-vpu", .data = &rk3568_vpu_variant, }, #endif #ifdef CONFIG_VIDEO_HANTRO_IMX8M { .compatible = "nxp,imx8mq-vpu", .data = &imx8mq_vpu_variant, }, diff --git a/drivers/staging/media/hantro/hantro_hw.h b/drivers/staging/media/hantro/hantro_hw.h index 4a19ae8940b9..89ec6d500938 100644 --- a/drivers/staging/media/hantro/hantro_hw.h +++ b/drivers/staging/media/hantro/hantro_hw.h @@ -307,6 +307,7 @@ extern const struct hantro_variant rk3066_vpu_variant; extern const struct hantro_variant rk3288_vpu_variant; extern const struct hantro_variant rk3328_vpu_variant; extern const struct hantro_variant rk3399_vpu_variant; +extern const struct hantro_variant rk3568_vpu_variant; extern const struct hantro_variant sama5d4_vdec_variant; extern const struct hantro_variant sunxi_vpu_variant; diff --git a/drivers/staging/media/hantro/rockchip_vpu_hw.c b/drivers/staging/media/hantro/rockchip_vpu_hw.c index c203b606e6e7..5e64cf068ff9 100644 --- a/drivers/staging/media/hantro/rockchip_vpu_hw.c +++ b/drivers/staging/media/hantro/rockchip_vpu_hw.c @@ -551,6 +551,20 @@ const struct hantro_variant rk3399_vpu_variant = { .num_clocks = ARRAY_SIZE(rockchip_vpu_clk_names) }; +const struct hantro_variant rk3568_vpu_variant = { + .dec_offset = 0x400, + .dec_fmts = rk3399_vpu_dec_fmts, + .num_dec_fmts = ARRAY_SIZE(rk3399_vpu_dec_fmts), + .codec = HANTRO_MPEG2_DECODER | + HANTRO_VP8_DECODER | HANTRO_H264_DECODER, + .codec_ops = rk3399_vpu_codec_ops, + .irqs = rockchip_vdpu2_irqs, + .num_irqs = ARRAY_SIZE(rockchip_vdpu2_irqs), + .init = rockchip_vpu_hw_init, + .clk_names = rockchip_vpu_clk_names, + .num_clocks = ARRAY_SIZE(rockchip_vpu_clk_names) +}; + const struct hantro_variant px30_vpu_variant = { .enc_offset = 0x0, .enc_fmts = rockchip_vpu_enc_fmts,