| Message ID | 1442579525-20440-1-git-send-email-srinivas.kandagatla@linaro.org |
|---|---|
| State | Accepted |
| Commit | f0b6d95062a6674a58e3aa0c19d170e9ab92e44f |
| Headers | show |
On 09/18/15 15:32, Srinivas Kandagatla wrote: > Add pwrseq support to sdcc4 which would enable a proper reset of WLAN > without ugly hacks in the board support file. > > Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Thanks Srini! Acked-by: Igor Grinberg <grinberg@compulab.co.il> > --- > arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 32 +++++++++++++++++++++++++++++ > 1 file changed, 32 insertions(+) > > diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts > index 8aac3be..cc9d942 100644 > --- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts > +++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts > @@ -1,4 +1,6 @@ > #include "qcom-apq8064-v2.0.dtsi" > +#include <dt-bindings/gpio/gpio.h> > +#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> > > / { > model = "CompuLab CM-QS600"; > @@ -12,6 +14,20 @@ > stdout-path = "serial0:115200n8"; > }; > > + pwrseq { > + #address-cells = <1>; > + #size-cells = <1>; > + ranges; > + compatible = "simple-bus"; > + > + sdcc4_pwrseq: sdcc4_pwrseq { > + pinctrl-names = "default"; > + pinctrl-0 = <&wlan_default_gpios>; > + compatible = "mmc-pwrseq-simple"; > + reset-gpios = <&pm8921_gpio 43 GPIO_ACTIVE_LOW>; > + }; > + }; > + > soc { > rpm@108000 { > regulators { > @@ -154,6 +170,21 @@ > regulator-always-on; > }; > > + qcom,ssbi@500000 { > + pmic@0 { > + gpio@150 { > + wlan_default_gpios: wlan-gpios { > + pios { > + pins = "gpio43"; > + function = "normal"; > + bias-disable; > + power-source = <PM8921_GPIO_S4>; > + }; > + }; > + }; > + }; > + }; > + > amba { > /* eMMC */ > sdcc1: sdcc@12400000 { > @@ -172,6 +203,7 @@ > status = "okay"; > vmmc-supply = <&v3p3_fixed>; > vqmmc-supply = <&v3p3_fixed>; > + mmc-pwrseq = <&sdcc4_pwrseq>; > }; > }; > }; >
diff --git a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts index 8aac3be..cc9d942 100644 --- a/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts +++ b/arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts @@ -1,4 +1,6 @@ #include "qcom-apq8064-v2.0.dtsi" +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> / { model = "CompuLab CM-QS600"; @@ -12,6 +14,20 @@ stdout-path = "serial0:115200n8"; }; + pwrseq { + #address-cells = <1>; + #size-cells = <1>; + ranges; + compatible = "simple-bus"; + + sdcc4_pwrseq: sdcc4_pwrseq { + pinctrl-names = "default"; + pinctrl-0 = <&wlan_default_gpios>; + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&pm8921_gpio 43 GPIO_ACTIVE_LOW>; + }; + }; + soc { rpm@108000 { regulators { @@ -154,6 +170,21 @@ regulator-always-on; }; + qcom,ssbi@500000 { + pmic@0 { + gpio@150 { + wlan_default_gpios: wlan-gpios { + pios { + pins = "gpio43"; + function = "normal"; + bias-disable; + power-source = <PM8921_GPIO_S4>; + }; + }; + }; + }; + }; + amba { /* eMMC */ sdcc1: sdcc@12400000 { @@ -172,6 +203,7 @@ status = "okay"; vmmc-supply = <&v3p3_fixed>; vqmmc-supply = <&v3p3_fixed>; + mmc-pwrseq = <&sdcc4_pwrseq>; }; }; };
Add pwrseq support to sdcc4 which would enable a proper reset of WLAN without ugly hacks in the board support file. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> --- arch/arm/boot/dts/qcom-apq8064-cm-qs600.dts | 32 +++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+)