diff mbox series

[v4,5/8] ARM: mstar: Link cpupll to second core

Message ID 20220126175604.17919-6-romain.perier@gmail.com
State Accepted
Commit 79f700c24b1314e3b49b9d998c38a56779ddbeba
Headers show
Series ARM: mstar: cpupll | expand

Commit Message

Romain Perier Jan. 26, 2022, 5:56 p.m. UTC 
From: Daniel Palmer <daniel@0x0f.com>

The second core also sources it's clock from the CPU PLL.

Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Reviewed-by: Romain Perier <romain.perier@gmail.com>
---
 arch/arm/boot/dts/mstar-infinity2m.dtsi | 2 ++
 1 file changed, 2 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/mstar-infinity2m.dtsi b/arch/arm/boot/dts/mstar-infinity2m.dtsi
index 6d4d1d224e96..dc339cd29778 100644
--- a/arch/arm/boot/dts/mstar-infinity2m.dtsi
+++ b/arch/arm/boot/dts/mstar-infinity2m.dtsi
@@ -11,6 +11,8 @@  cpu1: cpu@1 {
 		device_type = "cpu";
 		compatible = "arm,cortex-a7";
 		reg = <0x1>;
+		clocks = <&cpupll>;
+		clock-names = "cpuclk";
 	};
 };