diff mbox series

[08/24] crypto: qat - make PFVF send and receive direction agnostic

Message ID 20211216091334.402420-9-marco.chiappero@intel.com
State Accepted
Commit 028042856802c4731c6afebe15d95fed4d39a614
Headers show
Series crypto: qat - PFVF updates and improved GEN4 support | expand

Commit Message

Marco Chiappero Dec. 16, 2021, 9:13 a.m. UTC 
Currently PF and VF share the same send and receive logic for the PFVF
protocol. However, the inner behaviour still depends on the specific
direction, requiring a test to determine the if the sender is a PF or a
VF. Moreover the vf_nr parameter is only required for PF2VF messages and
ignored for the opposite direction.

Make the GEN2 send and recv completely direction agnostic, by calculating
and determining any direction specific input in the caller instead, and
feeding the send and the receive functions with the same arguments for
both PF and VF. In order to accommodate for this change, the API of the
pfvf_ops send and recv has been modified to remove any reference to vf_nr.

Signed-off-by: Marco Chiappero <marco.chiappero@intel.com>
Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Reviewed-by: Fiona Trahe <fiona.trahe@intel.com>
---
 .../crypto/qat/qat_common/adf_accel_devices.h |  5 +-
 drivers/crypto/qat/qat_common/adf_gen2_pfvf.c | 99 +++++++++++++------
 .../crypto/qat/qat_common/adf_pfvf_pf_proto.c | 11 ++-
 .../crypto/qat/qat_common/adf_pfvf_vf_proto.c | 11 ++-
 4 files changed, 89 insertions(+), 37 deletions(-)
diff mbox series

Patch

diff --git a/drivers/crypto/qat/qat_common/adf_accel_devices.h b/drivers/crypto/qat/qat_common/adf_accel_devices.h
index cc8b10b23145..d65d8dda8fda 100644
--- a/drivers/crypto/qat/qat_common/adf_accel_devices.h
+++ b/drivers/crypto/qat/qat_common/adf_accel_devices.h
@@ -154,8 +154,9 @@  struct adf_pfvf_ops {
 	u32 (*get_vf2pf_sources)(void __iomem *pmisc_addr);
 	void (*enable_vf2pf_interrupts)(void __iomem *pmisc_addr, u32 vf_mask);
 	void (*disable_vf2pf_interrupts)(void __iomem *pmisc_addr, u32 vf_mask);
-	int (*send_msg)(struct adf_accel_dev *accel_dev, u32 msg, u8 vf_nr);
-	u32 (*recv_msg)(struct adf_accel_dev *accel_dev, u8 vf_nr);
+	int (*send_msg)(struct adf_accel_dev *accel_dev, u32 msg,
+			u32 pfvf_offset, struct mutex *csr_lock);
+	u32 (*recv_msg)(struct adf_accel_dev *accel_dev, u32 pfvf_offset);
 };
 
 struct adf_hw_device_data {
diff --git a/drivers/crypto/qat/qat_common/adf_gen2_pfvf.c b/drivers/crypto/qat/qat_common/adf_gen2_pfvf.c
index 2e0b9ac27393..1e45f3230c19 100644
--- a/drivers/crypto/qat/qat_common/adf_gen2_pfvf.c
+++ b/drivers/crypto/qat/qat_common/adf_gen2_pfvf.c
@@ -115,15 +115,22 @@  static bool is_legacy_user_pfvf_message(u32 msg)
 	return !(msg & ADF_PFVF_MSGORIGIN_SYSTEM);
 }
 
+struct pfvf_gen2_params {
+	u32 pfvf_offset;
+	struct mutex *csr_lock; /* lock preventing concurrent access of CSR */
+	enum gen2_csr_pos local_offset;
+	enum gen2_csr_pos remote_offset;
+};
+
 static int adf_gen2_pfvf_send(struct adf_accel_dev *accel_dev, u32 msg,
-			      u8 vf_nr)
+			      struct pfvf_gen2_params *params)
 {
 	void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev);
+	enum gen2_csr_pos remote_offset = params->remote_offset;
+	enum gen2_csr_pos local_offset = params->local_offset;
 	unsigned int retries = ADF_PFVF_MSG_MAX_RETRIES;
-	enum gen2_csr_pos remote_offset;
-	enum gen2_csr_pos local_offset;
-	struct mutex *lock;	/* lock preventing concurrent acces of CSR */
-	u32 pfvf_offset;
+	struct mutex *lock = params->csr_lock;
+	u32 pfvf_offset = params->pfvf_offset;
 	u32 count = 0;
 	u32 int_bit;
 	u32 csr_val;
@@ -136,17 +143,6 @@  static int adf_gen2_pfvf_send(struct adf_accel_dev *accel_dev, u32 msg,
 	 * it and after encoding it. Which one to shift depends on the
 	 * direction.
 	 */
-	if (accel_dev->is_vf) {
-		pfvf_offset = GET_PFVF_OPS(accel_dev)->get_vf2pf_offset(0);
-		lock = &accel_dev->vf.vf2pf_lock;
-		local_offset = ADF_GEN2_CSR_VF2PF_OFFSET;
-		remote_offset = ADF_GEN2_CSR_PF2VF_OFFSET;
-	} else {
-		pfvf_offset = GET_PFVF_OPS(accel_dev)->get_pf2vf_offset(vf_nr);
-		lock = &accel_dev->pf.vf_info[vf_nr].pf2vf_lock;
-		local_offset = ADF_GEN2_CSR_PF2VF_OFFSET;
-		remote_offset = ADF_GEN2_CSR_VF2PF_OFFSET;
-	}
 
 	int_bit = gen2_csr_get_int_bit(local_offset);
 
@@ -208,23 +204,16 @@  static int adf_gen2_pfvf_send(struct adf_accel_dev *accel_dev, u32 msg,
 	}
 }
 
-static u32 adf_gen2_pfvf_recv(struct adf_accel_dev *accel_dev, u8 vf_nr)
+static u32 adf_gen2_pfvf_recv(struct adf_accel_dev *accel_dev,
+			      struct pfvf_gen2_params *params)
 {
 	void __iomem *pmisc_addr = adf_get_pmisc_base(accel_dev);
-	enum gen2_csr_pos local_offset;
-	u32 pfvf_offset;
+	enum gen2_csr_pos local_offset = params->local_offset;
+	u32 pfvf_offset = params->pfvf_offset;
 	u32 int_bit;
 	u32 csr_val;
 	u32 msg;
 
-	if (accel_dev->is_vf) {
-		pfvf_offset = GET_PFVF_OPS(accel_dev)->get_pf2vf_offset(0);
-		local_offset = ADF_GEN2_CSR_PF2VF_OFFSET;
-	} else {
-		pfvf_offset = GET_PFVF_OPS(accel_dev)->get_vf2pf_offset(vf_nr);
-		local_offset = ADF_GEN2_CSR_VF2PF_OFFSET;
-	}
-
 	int_bit = gen2_csr_get_int_bit(local_offset);
 
 	/* Read message */
@@ -252,6 +241,54 @@  static u32 adf_gen2_pfvf_recv(struct adf_accel_dev *accel_dev, u8 vf_nr)
 	return msg;
 }
 
+static int adf_gen2_pf2vf_send(struct adf_accel_dev *accel_dev, u32 msg,
+			       u32 pfvf_offset, struct mutex *csr_lock)
+{
+	struct pfvf_gen2_params params = {
+		.csr_lock = csr_lock,
+		.pfvf_offset = pfvf_offset,
+		.local_offset = ADF_GEN2_CSR_PF2VF_OFFSET,
+		.remote_offset = ADF_GEN2_CSR_VF2PF_OFFSET,
+	};
+
+	return adf_gen2_pfvf_send(accel_dev, msg, &params);
+}
+
+static int adf_gen2_vf2pf_send(struct adf_accel_dev *accel_dev, u32 msg,
+			       u32 pfvf_offset, struct mutex *csr_lock)
+{
+	struct pfvf_gen2_params params = {
+		.csr_lock = csr_lock,
+		.pfvf_offset = pfvf_offset,
+		.local_offset = ADF_GEN2_CSR_VF2PF_OFFSET,
+		.remote_offset = ADF_GEN2_CSR_PF2VF_OFFSET,
+	};
+
+	return adf_gen2_pfvf_send(accel_dev, msg, &params);
+}
+
+static u32 adf_gen2_pf2vf_recv(struct adf_accel_dev *accel_dev, u32 pfvf_offset)
+{
+	struct pfvf_gen2_params params = {
+		.pfvf_offset = pfvf_offset,
+		.local_offset = ADF_GEN2_CSR_PF2VF_OFFSET,
+		.remote_offset = ADF_GEN2_CSR_VF2PF_OFFSET,
+	};
+
+	return adf_gen2_pfvf_recv(accel_dev, &params);
+}
+
+static u32 adf_gen2_vf2pf_recv(struct adf_accel_dev *accel_dev, u32 pfvf_offset)
+{
+	struct pfvf_gen2_params params = {
+		.pfvf_offset = pfvf_offset,
+		.local_offset = ADF_GEN2_CSR_VF2PF_OFFSET,
+		.remote_offset = ADF_GEN2_CSR_PF2VF_OFFSET,
+	};
+
+	return adf_gen2_pfvf_recv(accel_dev, &params);
+}
+
 void adf_gen2_init_pf_pfvf_ops(struct adf_pfvf_ops *pfvf_ops)
 {
 	pfvf_ops->enable_comms = adf_enable_pf2vf_comms;
@@ -260,8 +297,8 @@  void adf_gen2_init_pf_pfvf_ops(struct adf_pfvf_ops *pfvf_ops)
 	pfvf_ops->get_vf2pf_sources = adf_gen2_get_vf2pf_sources;
 	pfvf_ops->enable_vf2pf_interrupts = adf_gen2_enable_vf2pf_interrupts;
 	pfvf_ops->disable_vf2pf_interrupts = adf_gen2_disable_vf2pf_interrupts;
-	pfvf_ops->send_msg = adf_gen2_pfvf_send;
-	pfvf_ops->recv_msg = adf_gen2_pfvf_recv;
+	pfvf_ops->send_msg = adf_gen2_pf2vf_send;
+	pfvf_ops->recv_msg = adf_gen2_vf2pf_recv;
 }
 EXPORT_SYMBOL_GPL(adf_gen2_init_pf_pfvf_ops);
 
@@ -270,7 +307,7 @@  void adf_gen2_init_vf_pfvf_ops(struct adf_pfvf_ops *pfvf_ops)
 	pfvf_ops->enable_comms = adf_enable_vf2pf_comms;
 	pfvf_ops->get_pf2vf_offset = adf_gen2_vf_get_pfvf_offset;
 	pfvf_ops->get_vf2pf_offset = adf_gen2_vf_get_pfvf_offset;
-	pfvf_ops->send_msg = adf_gen2_pfvf_send;
-	pfvf_ops->recv_msg = adf_gen2_pfvf_recv;
+	pfvf_ops->send_msg = adf_gen2_vf2pf_send;
+	pfvf_ops->recv_msg = adf_gen2_pf2vf_recv;
 }
 EXPORT_SYMBOL_GPL(adf_gen2_init_vf_pfvf_ops);
diff --git a/drivers/crypto/qat/qat_common/adf_pfvf_pf_proto.c b/drivers/crypto/qat/qat_common/adf_pfvf_pf_proto.c
index fb477eb89fef..4e4daec2ae34 100644
--- a/drivers/crypto/qat/qat_common/adf_pfvf_pf_proto.c
+++ b/drivers/crypto/qat/qat_common/adf_pfvf_pf_proto.c
@@ -19,7 +19,11 @@ 
  */
 int adf_send_pf2vf_msg(struct adf_accel_dev *accel_dev, u8 vf_nr, u32 msg)
 {
-	return GET_PFVF_OPS(accel_dev)->send_msg(accel_dev, msg, vf_nr);
+	struct adf_pfvf_ops *pfvf_ops = GET_PFVF_OPS(accel_dev);
+	u32 pfvf_offset = pfvf_ops->get_pf2vf_offset(vf_nr);
+
+	return pfvf_ops->send_msg(accel_dev, msg, pfvf_offset,
+				  &accel_dev->pf.vf_info[vf_nr].pf2vf_lock);
 }
 
 /**
@@ -33,7 +37,10 @@  int adf_send_pf2vf_msg(struct adf_accel_dev *accel_dev, u8 vf_nr, u32 msg)
  */
 static u32 adf_recv_vf2pf_msg(struct adf_accel_dev *accel_dev, u8 vf_nr)
 {
-	return GET_PFVF_OPS(accel_dev)->recv_msg(accel_dev, vf_nr);
+	struct adf_pfvf_ops *pfvf_ops = GET_PFVF_OPS(accel_dev);
+	u32 pfvf_offset = pfvf_ops->get_vf2pf_offset(vf_nr);
+
+	return pfvf_ops->recv_msg(accel_dev, pfvf_offset);
 }
 
 static int adf_handle_vf2pf_msg(struct adf_accel_dev *accel_dev, u32 vf_nr,
diff --git a/drivers/crypto/qat/qat_common/adf_pfvf_vf_proto.c b/drivers/crypto/qat/qat_common/adf_pfvf_vf_proto.c
index f8d1c7d0ec4e..56e8185a9630 100644
--- a/drivers/crypto/qat/qat_common/adf_pfvf_vf_proto.c
+++ b/drivers/crypto/qat/qat_common/adf_pfvf_vf_proto.c
@@ -27,7 +27,11 @@ 
  */
 int adf_send_vf2pf_msg(struct adf_accel_dev *accel_dev, u32 msg)
 {
-	return GET_PFVF_OPS(accel_dev)->send_msg(accel_dev, msg, 0);
+	struct adf_pfvf_ops *pfvf_ops = GET_PFVF_OPS(accel_dev);
+	u32 pfvf_offset = pfvf_ops->get_vf2pf_offset(0);
+
+	return pfvf_ops->send_msg(accel_dev, msg, pfvf_offset,
+				  &accel_dev->vf.vf2pf_lock);
 }
 
 /**
@@ -40,7 +44,10 @@  int adf_send_vf2pf_msg(struct adf_accel_dev *accel_dev, u32 msg)
  */
 static u32 adf_recv_pf2vf_msg(struct adf_accel_dev *accel_dev)
 {
-	return GET_PFVF_OPS(accel_dev)->recv_msg(accel_dev, 0);
+	struct adf_pfvf_ops *pfvf_ops = GET_PFVF_OPS(accel_dev);
+	u32 pfvf_offset = pfvf_ops->get_pf2vf_offset(0);
+
+	return pfvf_ops->recv_msg(accel_dev, pfvf_offset);
 }
 
 /**